Circuit board for mounting multilayer chip capacitor and circuit board apparatus including the multilayer chip capacitor
    62.
    发明授权
    Circuit board for mounting multilayer chip capacitor and circuit board apparatus including the multilayer chip capacitor 有权
    用于安装多层片状电容器的电路板和包括多层片状电容器的电路板装置

    公开(公告)号:US07684204B2

    公开(公告)日:2010-03-23

    申请号:US12155583

    申请日:2008-06-06

    IPC分类号: H05K7/00

    摘要: A circuit board including: a substrate having a mounting area for mounting a vertical multilayer chip capacitor having first and second external electrodes of a first polarity and a third external electrode of a second polarity; first to third pads arranged on the mounting area, the first and second pads having the first polarity and disposed separately from each other on the mounting area, the third pad having the second polarity and disposed between the first and second pads to be connected to the third external electrode; at least one first via formed in the substrate and connected to the first pad; at least one second via formed in the substrate and connected to the second pad; and a plurality of third vias formed in the substrate and connected to the third pad. The first via is disposed adjacent to the third pad relative to a central line of the first pad, the second via is disposed adjacent to the third pad relative to a central line of the second pad, one or more of the third vias are disposed adjacent to the first via relative to a central line of the third pad, and the rest of the third vias are disposed adjacent to the second via relative to the central line of the third pad.

    摘要翻译: 一种电路板,包括:具有用于安装具有第一极性的第一和第二外部电极和第二极性的第三外部电极的垂直多层片状电容器的安装区域的基板; 布置在安装区域上的第一至第三焊盘,第一和第二焊盘具有第一极性并且在安装区域上彼此分开设置,第三焊盘具有第二极性并且设置在第一焊盘和第二焊盘之间以连接到 第三外部电极; 至少一个第一通孔,其形成在所述基板中并连接到所述第一焊盘; 至少一个第二通孔,形成在所述衬底中并连接到所述第二衬垫; 以及形成在基板中并连接到第三焊盘的多个第三通孔。 第一通孔相对于第一焊盘的中心线设置成与第三焊盘相邻,第二通孔相对于第二焊盘的中心线设置为与第三焊盘相邻,第一通孔中的一个或多个邻近 相对于第三焊盘的中心线移动到第一通孔,并且第三通孔的其余部分相对于第三焊盘的中心线设置成与第二通孔相邻。

    Method and apparatus for deleting message in mobile terminal
    63.
    发明申请
    Method and apparatus for deleting message in mobile terminal 审中-公开
    用于在移动终端中删除消息的方法和装置

    公开(公告)号:US20100048178A1

    公开(公告)日:2010-02-25

    申请号:US12583280

    申请日:2009-08-18

    IPC分类号: H04W4/12

    CPC分类号: H04M1/72552

    摘要: A method and an apparatus efficiently deletes messages from a memory in a mobile terminal. In the method, a service message is received. Importance of the received service message is calculated. When there is no spare space for storing the received service message, a predetermined number of previously stored service messages are displayed according to importance of a message. At least one of the displayed service messages is selected and deleted.

    摘要翻译: 方法和装置有效地从移动终端中的存储器中删除消息。 在该方法中,接收服务消息。 计算接收到的服务消息的重要性。 当没有用于存储接收到的服务消息的备用空间时,根据消息的重要性显示预定数量的先前存储的服务消息。 显示的服务消息中至少有一个被选择和删除。

    MULTILAYER CHIP CAPACITOR
    64.
    发明申请
    MULTILAYER CHIP CAPACITOR 有权
    多层芯片电容器

    公开(公告)号:US20100033897A1

    公开(公告)日:2010-02-11

    申请号:US12340200

    申请日:2008-12-19

    IPC分类号: H01G4/38

    摘要: There is provided a multilayer chip capacitor a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged therein; and first to fourth outer electrodes, wherein the first capacitor unit includes first and second inner electrodes, and the first capacitor unit includes a plurality of capacitor elements each having a pair of the first and second inner electrodes repeatedly laminated, the second capacitor unit includes third and fourth inner electrodes, and the second capacitor unit includes at least one capacitor element having a pair of the third and fourth inner electrodes repeatedly laminated, and at least one of the capacitor elements of the first capacitor unit is different from the other capacitor elements of the first capacitor unit in a lamination number of the first and second inner electrodes or a resonant frequency.

    摘要翻译: 提供了一种多层片状电容器,其包括:电容器主体,包括布置在其中的第一和第二电容器单元; 以及第一至第四外部电极,其中所述第一电容器单元包括第一和第二内部电极,并且所述第一电容器单元包括多个电容器元件,每个电容器元件具有反复层叠的一对第一和第二内部电极,所述第二电容器单元包括第三电极单元 和第四内部电极,并且第二电容器单元包括至少一个电容器元件,其具有重复层叠的一对第三和第四内部电极,并且第一电容器单元的电容器元件中的至少一个与其他电容器元件不同 第一电容器单元的第一和第二内部电极的叠层数或谐振频率。

    Semiconductor memory device
    66.
    发明授权
    Semiconductor memory device 失效
    半导体存储器件

    公开(公告)号:US07638827B2

    公开(公告)日:2009-12-29

    申请号:US11260392

    申请日:2005-10-28

    申请人: Sung-Kwon Lee

    发明人: Sung-Kwon Lee

    IPC分类号: H01L27/108

    摘要: A semiconductor memory device capable of preventing bridge formations in a peripheral circuit region includes: a cell region; a peripheral circuit region adjacent to the cell region; and a plurality of line patterns formed in the cell region and the peripheral circuit region, wherein a spacing distance between the line patterns is at least onefold greater than a width of the line pattern.

    摘要翻译: 能够防止外围电路区域中的桥接形成的半导体存储器件包括:单元区域; 与所述单元区域相邻的外围电路区域; 以及形成在单元区域和外围电路区域中的多个线图案,其中线图案之间的间隔距离比线图案的宽度至少大一倍。

    HIGHLY INTEGRATED PHASE CHANGE MEMORY DEVICE HAVING MICRO-SIZED DIODES AND METHOD FOR MANUFACTURING THE SAME
    68.
    发明申请
    HIGHLY INTEGRATED PHASE CHANGE MEMORY DEVICE HAVING MICRO-SIZED DIODES AND METHOD FOR MANUFACTURING THE SAME 有权
    具有微尺寸二极管的高度集成相变存储器件及其制造方法

    公开(公告)号:US20090294752A1

    公开(公告)日:2009-12-03

    申请号:US12344805

    申请日:2008-12-29

    IPC分类号: H01L47/00 H01L21/336

    摘要: A highly integrated phase change memory device and a method for manufacturing the same is disclosed. The highly integrated phase change memory device includes a semiconductor substrate having a cell area and a peripheral area with impurity regions formed in the cell area and extending in parallel to each other in a first direction to form a striped pattern. A gate electrode is formed in the peripheral area and dummy gate electrodes are formed in the cell area and extending in a second direction perpendicular to the first direction of the impurity regions. An interlayer dielectric layer pattern exposes portions of the cell area and the peripheral area and a PN diode is formed in a space defined by a pair of dummy gate electrodes and a pair of interlayer dielectric layer patterns.

    摘要翻译: 公开了一种高度集成的相变存储器件及其制造方法。 高度集成的相变存储器件包括具有单元区域和外围区域的半导体衬底,其中杂质区域形成在单元区域中并沿着第一方向彼此平行地延伸以形成条纹图案。 在周边区域中形成栅电极,在单元区域形成虚拟栅电极,并沿与杂质区第一方向正交的第二方向延伸。 层间介质层图案暴露单元区域和周边区域的部分,并且在由一对虚拟栅极电极和一对层间介电层图案限定的空间中形成PN二极管。

    Apparatus and method for eliminating an interference signal in a communication system
    70.
    发明申请
    Apparatus and method for eliminating an interference signal in a communication system 有权
    用于消除通信系统中的干扰信号的装置和方法

    公开(公告)号:US20090227247A1

    公开(公告)日:2009-09-10

    申请号:US12380903

    申请日:2009-03-05

    IPC分类号: H04W36/20 H04B15/00 H04W24/00

    摘要: An apparatus and method for eliminating interference in a base station (BS) of a communication system. A first BS receives a first reception signal from a first mobile station located in a cell of the first base station. A second base station being adjacent to the first base station delivers decoding information of a second reception signal to the first base station, the second reception signal received from a second mobile station located in a cell of the second base station. The first BS determines whether an error exists on the second reception signal, based on the decoding information and re-generates an interference signal using the decoding information of the second reception signal when no error exists in the second reception signal, and performing interference elimination on the first reception signal using the re-generated interference signal.

    摘要翻译: 一种用于消除通信系统的基站(BS)中的干扰的装置和方法。 第一BS从位于第一基站的小区中的第一移动台接收第一接收信号。 与第一基站相邻的第二基站向第一基站传送第二接收信号的解码信息,从位于第二基站的小区的第二移动台接收的第二接收信号。 第一BS基于解码信息确定第二接收信号是否存在错误,并且当在第二接收信号中没有错误时,使用第二接收信号的解码信息重新产生干扰信号,并对 第一接收信号使用重新产生的干扰信号。