Lithography system and lithography method

    公开(公告)号:US10678148B2

    公开(公告)日:2020-06-09

    申请号:US16279237

    申请日:2019-02-19

    Abstract: A lithography system is provided and includes a light source device configured to emit a processing light beam onto the semiconductor wafer, to generate a penetrating light beam and a reflected light beam. The lithography system further includes a detecting module having a first detector and a second detector. The first detector is configured to receive the penetrating light beam to generate first power data, and the second detector is configured to receive the reflected light beam to generate second power data. The lithography system also includes a monitoring device configured to calculate absorbed power data of the semiconductor wafer according to the first power data, the second power data and reference power data of a reference light beam and configured to compensate for a pattern formed on the semiconductor wafer resulting from the processing light beam according to the absorbed power data and reference information.

    EUV LITHOGRAPHY MASK WITH A POROUS REFLECTIVE MULTILAYER STRUCTURE

    公开(公告)号:US20180314144A1

    公开(公告)日:2018-11-01

    申请号:US15798937

    申请日:2017-10-31

    Abstract: A lithography mask includes a substrate that contains a low thermal expansion material (LTEM). The lithography mask also includes a reflective structure disposed over the substrate. The reflective structure includes a first layer and a second layer disposed over the first layer. At least the second layer is porous. The mask is formed by forming a multilayer reflective structure over the LTEM substrate, including forming a plurality of repeating film pairs, where each film pair includes a first layer and a porous second layer. A capping layer is formed over the multilayer reflective structure. An absorber layer is formed over the capping layer.

    Lithography system and method
    57.
    发明授权

    公开(公告)号:US12124178B2

    公开(公告)日:2024-10-22

    申请号:US18310483

    申请日:2023-05-01

    CPC classification number: G03F9/7019

    Abstract: A system is provided. The system includes an exposing device configured to generate a real-time image, including multiple first align marks, of a mask and an adjusting device configured to adjust an off-set of the mask from a pre-determined position to be smaller than a minimum aligning distance according to the first align marks and multiple align marks on a substrate, and further to move the mask closer to the pre-determined position to have a displacement, less than a minimum mapping distance, from the pre-determined position according to the real-time image and a reference image of the mask.

    OVERLAY MARKS FOR REDUCING EFFECT OF BOTTOM LAYER ASYMMETRY

    公开(公告)号:US20230359135A1

    公开(公告)日:2023-11-09

    申请号:US18356710

    申请日:2023-07-21

    Abstract: Methods of fabricating and using an overlay mark are provided. In some embodiments, the overlay mark includes an upper layer and a lower layer disposed below the upper layer. The lower layer includes a first plurality of compound gratings extending in a first direction and disposed in a first region of the overlay mark, each of the first plurality of compound gratings including one first element and at least two second elements disposed on one side of the first element, and a second plurality of compound gratings extending the first direction and disposed in a second region of the overlay mark , each of the second plurality of compound gratings including one third element and at least two fourth elements on one side of the third element. The first plurality of compound gratings is a mirror image of the second plurality of compound gratings.

Patent Agency Ranking