公开(公告)号：US20170111664A1

公开(公告)日：2017-04-20

申请号：US15391854

申请日：2016-12-28

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/91 ,  H04N19/172 ,  H04N19/44 ,  H04N19/423

CPC classification number: H04N19/91 ,  H04N19/172 ,  H04N19/174 ,  H04N19/423 ,  H04N19/44

Abstract: A buffering apparatus for buffering context arrays of a multi-tile encoded picture having a plurality of tiles includes a first buffer and a second buffer. The first buffer is arranged to buffer a first context array referenced for performing entropy decoding upon a first tile of the multi-tile encoded picture. The second buffer is arranged to buffer a second context array referenced for performing entropy decoding upon a second tile of the multi-tile encoded picture. When the first tile is currently decoded according to the first context array buffered in the first buffer, the second context array is buffered in the second buffer.

公开(公告)号：US20160029022A1

公开(公告)日：2016-01-28

申请号：US14806664

申请日：2015-07-23

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Chih-Ming Wang ,  Yung-Chang Chang ,  Chun-Chia Chen ,  Meng-Jye Hu ,  Huei-Min Lin

IPC: H04N19/119 ,  H04N19/91

CPC classification number: H04N19/119 ,  H04N19/157 ,  H04N19/176 ,  H04N19/91 ,  H04N19/96

Abstract: A video processing apparatus includes a first processing circuit, a second processing circuit, and a control circuit. The first processing circuit performs a first processing operation. The second processing circuit performs a second processing operation different from the first processing operation. The control circuit generates at least one output coding unit to the second processing circuit according to an input coding unit generated from the first processing circuit, wherein the control circuit checks a size of the input coding unit to selectively split the input coding unit into a plurality of output coding units.

Abstract translation: 视频处理装置包括第一处理电路，第二处理电路和控制电路。 第一处理电路执行第一处理操作。 第二处理电路执行与第一处理操作不同的第二处理操作。 所述控制电路根据从所述第一处理电路产生的输入编码单元，向所述第二处理电路生成至少一个输出编码单元，其中，所述控制电路检查所述输入编码单元的大小，以选择性地将所述输入编码单元分割成多个 的输出编码单元。

公开(公告)号：US10939102B2

公开(公告)日：2021-03-02

申请号：US16666380

申请日：2019-10-28

Applicant: MEDIATEK INC.

Inventor： Yung-Chang Chang ,  Chih-Ming Wang ,  Chia-Yun Cheng ,  Chi-Hung Chen ,  Kai-Chun Lin ,  Chih-Wen Yang ,  Hsuan-Wen Peng

IPC: H04N19/117 ,  H04N19/82 ,  H04N19/182 ,  H04N19/176

Abstract: A post processing apparatus includes a super-resolution (SR) filtering circuit and a loop restoration (LR) filtering circuit. The SR filtering circuit applies SR filtering to a processing result of a preceding circuit. The LR filtering circuit applies LR filtering to a processing result of the SR filtering circuit. Before the SR filtering circuit finishes SR filtering of all pixels of a frame that are generated by the preceding circuit, the LR filtering circuit starts LR filtering of pixels that are derived from applying SR filtering to pixels included in the frame.

公开(公告)号：US10778980B2

公开(公告)日：2020-09-15

申请号：US16677598

申请日：2019-11-07

Applicant: MEDIATEK INC.

Inventor： Ming-Long Wu ,  Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/13 ,  H04N19/44 ,  G06F9/38 ,  H04N19/172 ,  H04N19/70

Abstract: An entropy decoding apparatus includes an entropy decoding circuit, a pre-fetch circuit, and a context pre-load buffer. The pre-fetch circuit pre-fetches at least one candidate context for entropy decoding of a part of an encoded bitstream of a frame before the entropy decoding circuit starts entropy decoding of the part of the encoded bitstream of the frame. The context pre-load buffer buffers the at least one candidate context. When a target context actually needed by entropy decoding of the part of the encoded bitstream of the frame is not available in the context pre-load buffer, the context pre-load buffer instructs the pre-fetch circuit to re-fetch the target context, and the entropy decoding circuit stalls entropy decoding of the part of the encoded bitstream of the frame.

公开(公告)号：US10390028B2

公开(公告)日：2019-08-20

申请号：US15578221

申请日：2016-06-03

Applicant: MEDIATEK INC.

Inventor： Yu-Chen Sun ,  Tzu-Der Chuang ,  Han-Liang Chou ,  Chia-Yun Cheng ,  Ching-Yeh Chen ,  Yu-Wen Huang

IPC: H04N19/00 ,  H04N19/186 ,  H04N19/51 ,  H04N19/593 ,  H04N19/423 ,  H04N19/433 ,  H04N19/176 ,  H04N19/70

Abstract: Methods of palette coding to reduce the required coding process are disclosed. According to one method, smaller blocks are derived from a large block. The histogram of the large block is derived based on the histograms of smaller blocks in the large block. According to another method, one or more palette tables are derived based on multiple blocks. One palette table is used for each of the multiple blocks. According to yet another method, index map transpose is performed in the parsing stage according to the transpose flag of the index map. Accordingly, a buffer to store the transpose flags can be saved. According to still yet another method, the palette predictor update is performed using an index mapping table to avoid the need for shuffling the contents of the palette predictor stored in a palette buffer.

公开(公告)号：US10375395B2

公开(公告)日：2019-08-06

申请号：US15439964

申请日：2017-02-23

Applicant: MEDIATEK INC.

Inventor： Sheng-Jen Wang ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04N19/13 ,  H04N19/70 ,  G06F13/28 ,  H04N19/91 ,  H04N19/42

Abstract: A video processing apparatus includes an external storage device, a hardware entropy engine, and a software execution engine. The hardware entropy engine performs entropy processing of a current picture, and further outputs count information to the external storage device during the entropy processing of the current picture. When loaded and executed by the software execution engine, a software program instructs the software execution engine to convert the count information into count table contents, and generate a count table in the external storage device according to at least the count table contents. The count table is referenced to apply a backward adaptation to a probability table that is selectively used by the hardware entropy engine to perform entropy processing of a next picture.

公开(公告)号：US20190075312A1

公开(公告)日：2019-03-07

申请号：US16124170

申请日：2018-09-06

Applicant: MEDIATEK INC.

Inventor： Yung-Chang Chang ,  Chia-Yun Cheng ,  Chih-Ming Wang ,  Meng-Jye Hu ,  Cheng-Han Li

IPC: H04N19/44 ,  H04N19/30 ,  H04N19/68

Abstract: A video decoding method is used for decoding a multi-plane video bitstream. The multi-plane video bitstream includes a first video subset bitstream corresponding to a fundamental plane (FP) and at least one second video subset bitstream corresponding to at least one augmented plane (AP). The video decoding method includes decoding the first video subset bitstream, decoding the at least one second video subset bitstream, and performing resampling of one decoded FP frame to generate one resampled frame. Decoding the first video subset bitstream includes performing decoding of a first FP frame to generate a first decoded FP frame. Decoding the at least one second video subset bitstream includes performing decoding of a first AP frame to generate a first decoded AP frame. A processing time of performing decoding of the first FP frame overlaps a processing time of performing resampling of said one decoded FP frame.

公开(公告)号：US10123028B2

公开(公告)日：2018-11-06

申请号：US15028717

申请日：2015-09-17

Applicant: MEDIATEK INC.

Inventor： Ming-Long Wu ,  Chia-Yun Cheng ,  Yung-Chang Chang

IPC: H04N19/70 ,  H04N19/436 ,  H04N19/593 ,  H04N19/91 ,  H04N19/127 ,  H04N19/172 ,  H04N19/174 ,  H04N19/184 ,  H04N19/44

Abstract: A syntax parsing apparatus includes a plurality of syntax parsing circuits and a dispatcher. Each of the syntax parsing circuits has at least entropy decoding capability. The syntax parsing circuits generate a plurality of entropy decoding results of a plurality of image regions within a same frame, respectively. The dispatcher assigns bitstream start points of the image regions to the syntax parsing circuits, and triggers the syntax parsing circuits to start entropy decoding, respectively.

公开(公告)号：US10070070B2

公开(公告)日：2018-09-04

申请号：US14722162

申请日：2015-05-27

Applicant: MEDIATEK INC.

Inventor： Meng-Jye Hu ,  Yung-Chang Chang ,  Chia-Yun Cheng

IPC: H04B1/66 ,  H04N5/262 ,  H04N19/159 ,  H04N19/176 ,  H04N19/70 ,  H04N19/122 ,  H04N19/136

Abstract: One exemplary video processing apparatus includes a control circuit and a size selection circuit. The control circuit determines picture boundary information. The size selection circuit refers to at least the picture boundary information to select a size for a block associated with encoding of a picture, wherein selection of the size is constrained by the picture boundary information to ensure that the block with the selected size is not across a picture boundary of the picture.

公开(公告)号：US09912968B2

公开(公告)日：2018-03-06

申请号：US14767912

申请日：2015-01-21

Applicant: MEDIATEK INC.

Inventor： Chia-Yun Cheng ,  Chi-Cheng Ju ,  Yung-Chang Chang ,  Chih-Ming Wang

IPC: H04N19/91 ,  H04N19/176 ,  H04N19/60 ,  H04N19/44 ,  H04N19/463 ,  H04N19/129 ,  H04N19/70 ,  H04N19/18 ,  H04N19/82

CPC classification number: H04N19/91 ,  H04N19/129 ,  H04N19/176 ,  H04N19/18 ,  H04N19/44 ,  H04N19/463 ,  H04N19/60 ,  H04N19/70 ,  H04N19/82

Abstract: A decoding apparatus has an arithmetic decoder and a controller. A counter logic of the controller generates a first statistics result according to a first syntax element decoding result. A control logic of the controller instructs the arithmetic decoder to perform a first scan procedure at least once to generate the first syntax element decoding result of transform coefficients of a transform coefficient block, controls a repetition number of a second scan procedure based at least partly on the first statistics result, and instructs the arithmetic decoder to perform the second scan procedure at least once to generate a second syntax element decoding result of the transform coefficients. The first scan procedure decodes a first coded syntax element of one transform coefficient when performed by the arithmetic decoder once. The second scan procedure decodes a second coded syntax element of one transform coefficient when performed by the arithmetic decoder once.