公开(公告)号：US20160163561A1

公开(公告)日：2016-06-09

申请号：US14724574

申请日：2015-05-28

申请人： Lam Research Corporation

发明人： Eric A. Hudson ,  Dennis M. Hausmann ,  Joseph Scott Briggs

IPC分类号： H01L21/311 ,  C23C16/50 ,  H01L27/115 ,  H01J37/32 ,  H01L27/108 ,  C23C16/455 ,  C23C16/52

CPC分类号： H01L21/3065 ,  C23C16/00 ,  C23C16/045 ,  C23C16/45525 ,  H01J37/32009 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32513 ,  H01J37/32577 ,  H01J37/32623 ,  H01J37/32651 ,  H01J37/32871 ,  H01J37/32899 ,  H01J2237/334 ,  H01L21/02118 ,  H01L21/0212 ,  H01L21/0228 ,  H01L21/31116 ,  H01L27/1085 ,  H01L27/11556 ,  H01L27/11582

摘要： Various embodiments herein relate to methods, apparatus and systems for forming a recessed feature in dielectric material on a semiconductor substrate. Separate etching and deposition operations are employed in a cyclic manner. Each etching operation partially etches the feature. Each deposition operation forms a protective coating on the sidewalls of the feature to prevent lateral etch of the dielectric material during the etching operations. The protective coating may be deposited using methods that result in formation of the protective coating along substantially the entire length of the sidewalls. The protective coating may be deposited using particular reactants and/or reaction mechanisms that result in substantially complete sidewall coating at relatively low temperatures without the use of plasma. In some cases the protective coating is deposited using molecular layer deposition techniques.

公开(公告)号：US09105700B2

公开(公告)日：2015-08-11

申请号：US14105073

申请日：2013-12-12

申请人： Lam Research Corporation

发明人： Ananth Indrakanti ,  Peng Wang ,  Eric A. Hudson

IPC分类号： H01L21/4763 ,  H01L21/768

CPC分类号： H01L21/76897 ,  H01J37/32082 ,  H01J37/32091 ,  H01J37/32449 ,  H01J37/32532 ,  H01J37/32715 ,  H01J2237/332 ,  H01J2237/334 ,  H01L21/31051 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/67069 ,  H01L21/6831 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76819 ,  H01L21/76877

摘要： A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.

摘要翻译： 在布置在硬掩模下方的低k电介质层中蚀刻自对准接触/通孔特征的方法，其设置在平坦化层下方。 提供至少一个循环，其中每个循环包括使平坦化层变薄，在硬掩模和平坦化层上形成沉积层; 并蚀刻由沉积层掩蔽的低k电介质层。

公开(公告)号：US20150206775A1

公开(公告)日：2015-07-23

申请号：US14676711

申请日：2015-04-01

申请人： Lam Research Corporation

发明人： Eric A. Hudson ,  Andrew D. Bailey, III ,  Rajinder Dhindsa

IPC分类号： H01L21/67 ,  H01J37/32 ,  H01L21/311

CPC分类号： H01L21/3065 ,  H01J37/32009 ,  H01J37/32091 ,  H01J37/321 ,  H01J37/32192 ,  H01J37/32357 ,  H01J37/32449 ,  H01J37/32458 ,  H01J37/32715 ,  H01J2237/334 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67069

摘要： Methods for etching a substrate in a plasma processing chamber having at least a primary plasma generating region and a secondary plasma generating region separated from said primary plasma generating region by a semi-barrier structure. The method includes generating a primary plasma from a primary feed gas in the primary plasma generating region. The method also includes generating a secondary plasma from a secondary feed gas in the secondary plasma generating region to enable at least some species from the secondary plasma to migrate into the primary plasma generating region. The method additionally includes etching the substrate with the primary plasma after the primary plasma has been augmented with migrated species from the secondary plasma.

摘要翻译： 用于蚀刻具有至少一个初级等离子体产生区域的等离子体处理室中的衬底和通过半屏障结构从所述初级等离子体产生区域分离的次级等离子体产生区域的方法。 该方法包括从主要等离子体产生区域中的主进料气体产生主要等离子体。 该方法还包括从次级等离子体产生区域中的二次进料气体产生二次等离子体，以使至少一些来自第二等离子体的物质迁移到初级等离子体产生区域。 该方法另外包括在初级等离子体已经用来自二次等离子体的迁移物质增强之后用初级等离子体蚀刻基板。