公开(公告)号：US09627421B2

公开(公告)日：2017-04-18

申请号：US14443474

申请日：2014-10-01

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Seungjin Choi ,  Jing Niu ,  Fangzhen Zhang

IPC: H01L27/12 ,  H01L27/32 ,  G02F1/1343 ,  H01L21/77 ,  G02F1/1333 ,  G02F1/1368 ,  H01L29/786 ,  G02F1/1362

CPC classification number: H01L27/1288 ,  G02F1/133345 ,  G02F1/134309 ,  G02F1/13439 ,  G02F1/136227 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2001/13625 ,  G02F2001/136295 ,  H01L21/77 ,  H01L27/12 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/127 ,  H01L27/32 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/78642 ,  H01L29/7869 ,  H01L29/78696

Abstract: An array substrate and manufacturing method thereof and a display device. The display device includes a pixel electrode (8), including a first portion (b) in a non-display region and a second portion (a) in a display region; a first electrode (6) formed on the first portion (b) of the pixel electrode (8); a passivation layer (9) formed on the pixel electrode (8) and the first electrode (6), the passivation layer (9) includes a via hole (11) located over the first electrode (6); an active layer (4) and a second electrode (7) that are formed on the passivation layer (9), the active layer (4) being connected to the first electrode (6) through the via hole (11) of the passivation layer (9). With the array substrate and the manufacturing method thereof, the manufacturing cost is reduced, materials of the electrodes are less subjected to corrosion, and quality of the array substrate is enhanced.

公开(公告)号：US09543443B2

公开(公告)日：2017-01-10

申请号：US14777666

申请日：2015-02-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Shuang Sun ,  Fangzhen Zhang ,  Jing Niu ,  Zhijun Lv

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L29/78675 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/41733 ,  H01L29/66757 ,  H01L29/78633 ,  H01L29/78696

Abstract: The present disclosure discloses a thin film transistor assembly, an array substrate and a method of manufacturing the same, and a display device including the array substrate. The array substrate includes a substrate; a plurality of thin film transistors formed on the substrate; and a plurality of light shielding layers, each of the light shielding layers being arranged between a source electrode and a drain electrode of the thin film transistor and configured to block light from the exterior from illuminating an active layer of the thin film transistor. The light shielding layer and the source electrode and the drain electrode of the thin film transistor are formed in the same layer on the substrate. As the light shielding layer, the source electrode and the drain electrode of the thin film transistor and a data line may be formed on the substrate by using the same material layer through a single patterning process, times of performing patterning processes and the number of masks used may be reduced and thus manufacturing process and cost of the array substrate may be decreased.

Abstract translation: 本公开公开了一种薄膜晶体管组件，阵列基板及其制造方法，以及包括阵列基板的显示装置。 阵列基板包括基板; 形成在所述基板上的多个薄膜晶体管; 和多个遮光层，每个遮光层设置在薄膜晶体管的源电极和漏电极之间，并被构造成阻挡来自外部的光照射薄膜晶体管的有源层。 薄膜晶体管的遮光层和源电极以及漏极形成在基板上的同一层中。 作为遮光层，可以通过使用相同的材​​料层，通过单一的图案化工艺，进行图案化处理的次数和掩模的数量，在基板上形成薄膜晶体管的源电极和漏电极以及数据线 可以减少使用，因此阵列基板的制造工艺和成本可能降低。

公开(公告)号：US09502446B2

公开(公告)日：2016-11-22

申请号：US13985336

申请日：2012-11-16

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Fangzhen Zhang

IPC: H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786

CPC classification number: H01L27/127 ,  H01L27/1222 ,  H01L29/66757 ,  H01L29/78618

Abstract: Provided are a poly-silicon thin film transistor (TFT), a poly-silicon array substrate and a preparing method thereof, and a display device for solving the problems of excessive mask plates, complicated process and high costs in a conventional technology. The method of preparing the poly-silicon TFT comprising a doped region comprises steps: forming a poly-silicon layer on a substrate, forming an active layer by a patterning process; forming a first insulating layer; forming, by a patterning process, via holes exposing the active layer, the source electrode and the drain electrode being connected through the via holes to the active layer; doping the active layer through the via holes by a doping process to form a doped region; forming a source-drain metal layer, and forming the source electrode and the drain electrode by a patterning process.

Abstract translation: 提供了一种多晶硅薄膜晶体管（TFT），多晶硅阵列基板及其制备方法，以及用于解决过去的掩模板的问题，复杂的工艺和高成本的显示装置。 制备包含掺杂区域的多晶硅TFT的方法包括以下步骤：在衬底上形成多晶硅层，通过图案化工艺形成有源层; 形成第一绝缘层; 通过图案化工艺形成通过所述有源层，所述源极电极和所述漏极电极通过所述通孔连接到所述有源层的通孔; 通过掺杂工艺通过通孔掺杂有源层以形成掺杂区域; 形成源极 - 漏极金属层，并通过图案化工艺形成源电极和漏电极。

公开(公告)号：US20150316803A1

公开(公告)日：2015-11-05

申请号：US14444174

申请日：2014-07-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Fangzhen Zhang ,  Choi-Seung Jin ,  Guanbao Hui ,  Shuang Sun ,  Jing Niu

IPC: G02F1/1368 ,  B32B37/12 ,  G02F1/1333 ,  B32B37/18 ,  H01L27/12 ,  G02F1/1335

CPC classification number: G02F1/1333 ,  B32B37/1292 ,  B32B37/18 ,  B32B2457/202 ,  G02F1/133308 ,  G02F1/133514 ,  G02F1/1368 ,  G02F2001/133325 ,  H01L27/1214 ,  H01L27/1259 ,  Y10T156/10

Abstract: An embodiment of the present invention discloses a curved surface display apparatus and a method for producing the same, which can simplify the structure of the curved surface display apparatus and reduce its producing process. The method comprises: adhering frame regions of a first substrate and a second substrate to each other by using a sealing agent to form the assembled first substrate and second substrate, the first substrate and the second substrate having different coefficients of thermal expansion; heating the assembled first substrate and second substrate from a first predetermined temperature value at which the sealing agent is not curable to a second predetermined temperature value at which the sealing agent is curable; and cooling the heated first substrate and second substrate.

Abstract translation: 本发明的实施例公开了一种弯曲表面显示装置及其制造方法，其可以简化曲面显示装置的结构并减少其制造过程。 该方法包括：通过使用密封剂将第一基板和第二基板的框架区域彼此粘合以形成组装的第一基板和第二基板，第一基板和第二基板具有不同的热膨胀系数; 从密封剂不可固化的第一预定温度值加热组装的第一基材和第二基材至密封剂可固化的第二预定温度值; 并且冷却被加热的第一基板和第二基板。