公开(公告)号：US07482236B2

公开(公告)日：2009-01-27

申请号：US11602809

申请日：2006-11-21

申请人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

发明人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

IPC分类号： H01L21/8234

CPC分类号： H01L29/4983 ,  H01L21/28282 ,  H01L21/823828 ,  H01L21/823864 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/517 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/792 ,  H01L29/7923 ,  Y10S438/954

摘要： A gate stack is formed on a substrate. The gate stack has a sidewall. An oxide-nitride-oxide material is deposited on the gate stack. Portions of the oxide-nitride-oxide material are removed to form an oxide-nitride-oxide structure. The oxide-nitride-oxide structure has a generally L-shaped cross-section with a vertical portion along at least part of the gate stack sidewall and a horizontal portion along the substrate. A top oxide material is deposited over the substrate. A silicon nitride spacer material is deposited over the top oxide material. Portions of the top oxide material and the silicon nitride spacer material are removed to form a silicon nitride spacer separated from the oxide-nitride-oxide stack by the top oxide material. Source/drain regions are formed in the substrate.

摘要翻译： 栅极堆叠形成在基板上。 栅极堆叠具有侧壁。 氧化物 - 氮化物 - 氧化物材料沉积在栅极叠层上。 除去氧化物 - 氮化物 - 氧化物材料的一部分以形成氧化物 - 氧化物 - 氧化物结构。 氧化物 - 氧化物 - 氧化物结构具有通常为L形的横截面，沿着栅极叠层侧壁的至少一部分和沿着衬底的水平部分具有垂直部分。 顶部氧化物材料沉积在衬底上。 在顶部氧化物材料上沉积氮化硅间隔物材料。 除去顶部氧化物材料和氮化硅间隔物材料的部分以形成通过顶部氧化物材料从氧化物 - 氮化物 - 氧化物堆叠体分离的氮化硅间隔物。 源极/漏极区域形成在衬底中。

公开(公告)号：US20070145465A1

公开(公告)日：2007-06-28

申请号：US11313790

申请日：2005-12-22

申请人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

发明人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

IPC分类号： H01L29/788

CPC分类号： H01L29/42332 ,  H01L21/28273 ,  H01L29/7881

摘要： Non-volatile floating gate memory cells with polysilicon storage dots and fabrication methods thereof. The non-volatile floating gate memory cell comprises a semiconductor substrate of a first conductivity type. A first region of a second conductivity type different from the first conductivity type is formed in the semiconductor substrate. A second region of the second conductivity type is formed in the semiconductor substrate spaced apart from the first region. A channel region connects the first and second regions for the conduction of charges. A dielectric layer is disposed on the channel region. A control gate is disposed on the dielectric layer. A tunnel dielectric layer is conformably formed on the semiconductor substrate and the control gate. Two charge storage dots are spaced apart from each other at opposing lateral edges of the sidewalls of the control gate and surface of the semiconductor substrate.

摘要翻译： 具有多晶硅存储点的非易失性浮动栅极存储单元及其制造方法。 非易失性浮动栅极存储单元包括第一导电类型的半导体衬底。 在半导体衬底中形成不同于第一导电类型的第二导电类型的第一区域。 第二导电类型的第二区域形成在与第一区域间隔开的半导体衬底中。 通道区域连接第一和第二区域用于电荷传导。 电介质层设置在沟道区上。 控制栅极设置在电介质层上。 在半导体衬底和控制栅上一致地形成隧道介电层。 两个电荷存储点在控制栅极的侧壁和半导体衬底的表面的相对侧边缘处彼此间隔开。

公开(公告)号：US20070096200A1

公开(公告)日：2007-05-03

申请号：US11642658

申请日：2006-12-21

申请人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

发明人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  H01L21/2815 ,  H01L29/40114 ,  H01L29/42324

摘要： A self-aligned conductive spacer process for fabricating sidewall control gates on both sides of a floating gate for high-speed RAM applications, which can well define dimensions and profiles of the sidewall control gates. A conductive layer is formed on the dielectric layer to cover a floating gate patterned on a semiconductor substrate. Oxide spacer are formed on the conductive layer adjacent to the sidewalls of the floating gate. Performing an anisotropic etch process on the conductive layer and using the oxide spacers as a hard mask, a conductive spacers are self-aligned fabricated at both sides of the floating gate, serving as sidewall control gates.

摘要翻译： 一种用于在用于高速RAM应用的浮动栅极的两侧上制造侧壁控制栅极的自对准导电间隔物工艺，其可以很好地限定侧壁控制栅极的尺寸和轮廓。 在电介质层上形成导电层，以覆盖图案化在半导体衬底上的浮动栅极。 在与浮动栅极的侧壁相邻的导电层上形成氧化物间隔物。 在导电层上进行各向异性蚀刻处理并使用氧化物间隔物作为硬掩模，导电间隔物在浮栅的两侧制造，用作侧壁控制栅极。

公开(公告)号：US07176084B2

公开(公告)日：2007-02-13

申请号：US11148342

申请日：2005-06-09

申请人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

发明人： Tzyh-Cheang Lee ,  Fu-Liang Yang ,  Jiunn-Ren Hwang ,  Tsung-Lin Lee

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/4763 ,  H01L21/3205 ,  H01L21/461 ,  H01L21/302

CPC分类号： H01L29/7881 ,  H01L21/2815 ,  H01L21/28273 ,  H01L29/42324

摘要： A self-aligned conductive spacer process for fabricating sidewall control gates on both sides of a floating gate for high-speed RAM applications, which can well define dimensions and profiles of the sidewall control gates. A conductive layer is formed on the dielectric layer to cover a floating gate patterned on a semiconductor substrate. Oxide spacer are formed on the conductive layer adjacent to the sidewalls of the floating gate. Performing an anisotropic etch process on the conductive layer and using the oxide spacers as a hard mask, a conductive spacers are self-aligned fabricated at both sides of the floating gate, serving as sidewall control gates.

公开(公告)号：US20060019451A1

公开(公告)日：2006-01-26

申请号：US10710581

申请日：2004-07-22

申请人： Jeng-Huey Hwang ,  Wei-Tsun Shiau ,  Chien-Ting Lin ,  Jiunn-Ren Hwang

发明人： Jeng-Huey Hwang ,  Wei-Tsun Shiau ,  Chien-Ting Lin ,  Jiunn-Ren Hwang

IPC分类号： H01L21/461

CPC分类号： H01L21/31116 ,  H01L21/31111 ,  H01L21/31122 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/517 ,  H01L29/78 ,  Y10S438/906

摘要： A wafer has a trench, a STI layer formed in the trench, an HfO2-containing gate dielectric covering the wafer and the STI layer, a gate electrode formed on the HfO2-containing gate dielectric, and at least a spacer formed beside the gate electrode. The wafer is preheated and a bromine-rich gas plasma is provided to remove portions of the HfO2-containing gate dielectric.

公开(公告)号：US06664028B2

公开(公告)日：2003-12-16

申请号：US09729575

申请日：2000-12-04

申请人： Jiunn-Ren Hwang ,  I-Hsiung Huang

发明人： Jiunn-Ren Hwang ,  I-Hsiung Huang

IPC分类号： G03C556

CPC分类号： G03F7/0035 ,  G03F7/40

摘要： A method of forming an opening in a wafer layer. At least two patterned photoresist layers are formed on a wafer layer. Using different photoresist layers, many openings are defined. The wafer layer is then etched to form the opening. Each photoresist layer has a parallel linear pattern such as parallel strips or an array of rectangular blocks. The photoresist layers are superposed in a way that spaces between the patterns for each photoresist layers overlapped with each other for form openings that expose the underlying wafer layers. The wafer layer exposed in the openings is then etched to form contact/via holes without rounded corners while the rounded profiles has been cancelled by the superposition of the photoresist layers.

公开(公告)号：US06638664B2

公开(公告)日：2003-10-28

申请号：US09954933

申请日：2001-09-18

申请人： Chang-Jyh Hsieh ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Chien-Ming Wang

发明人： Chang-Jyh Hsieh ,  Jiunn-Ren Hwang ,  Kuei-Chun Hung ,  Chien-Ming Wang

IPC分类号： G03F900

CPC分类号： G03F1/36

摘要： A method of correcting an optical mask pattern. A third pattern having a first strip-like pattern and a second strip-like pattern is provided. The first strip-like pattern attaches to the mid-section of the second strip-like pattern. A first modification step is conducted. A pair of assistant patterns is added to the respective sides of the first strip-like pattern to form a first modified pattern. A second modification step is conducted to shrink a portion of the first strip-like pattern to form a second modified pattern. Dimension in the reduced portion of the first strip-like pattern is a critical dimension of a main pattern. A third modification step is conducted using an optical proximity correction method. The second modified pattern is modified to a third modified pattern.

公开(公告)号：US06380077B1

公开(公告)日：2002-04-30

申请号：US09835199

申请日：2001-04-13

申请人： I-Hsiung Huang ,  Jiunn-Ren Hwang

发明人： I-Hsiung Huang ,  Jiunn-Ren Hwang

IPC分类号： H01L214763

CPC分类号： H01L21/31144 ,  G03F7/0035 ,  H01L21/0271 ,  H01L21/76816

摘要： A method of forming a contact opening. A substrate having a conductive structure and a dielectric layer thereon is provided. A first photoresist layer is formed over the dielectric layer. A first photo-exposure followed by a photoresist development is conducted so that an opening pattern on the photomask is transferred to the first photoresist layer. The first photoresist layer includes a first opening that exposes a portion of the dielectric layer. A second photoresist layer is formed over the patterned first photoresist layer. The photomask is shifted horizontally relative to the substrate. A second photo-exposure followed by a photoresist development is conducted so that the opening pattern on the photomask is transferred to the second photoresist layer. The second photoresist layer includes a second opening that exposes a portion of the first photoresist layer and a portion of the first opening. Thereafter, using the first and the second photoresist layer as a mask, a portion of the dielectric layer is removed until a contact opening that exposes a portion of the conductive structure is formed. The first and the second photoresist layer are then removed, followed by forming a glue layer over the substrate to conform with a profile of the contact opening. Finally, the contact opening is filled with a metal plug.

摘要翻译： 一种形成接触开口的方法。 提供具有导电结构和其上的电介质层的衬底。 在电介质层上形成第一光致抗蚀剂层。 进行第一次曝光，然后进行光致抗蚀剂显影，使得光掩模上的开口图案被转印到第一光致抗蚀剂层。 第一光致抗蚀剂层包括暴露介电层的一部分的第一开口。 在图案化的第一光致抗蚀剂层上形成第二光致抗蚀剂层。 光掩模相对于基板水平移动。 进行第二次曝光，然后进行光致抗蚀剂显影，使得光掩模上的开口图案被转印到第二光致抗蚀剂层。 第二光致抗蚀剂层包括暴露第一光致抗蚀剂层的一部分和第一开口的一部分的第二开口。 此后，使用第一和第二光致抗蚀剂层作为掩模，去除电介质层的一部分，直到形成露出导电结构的一部分的接触开口。 然后去除第一和第二光致抗蚀剂层，随后在衬底上形成胶层以符合接触孔的轮廓。 最后，接触开口填充有金属塞。

公开(公告)号：US06316340B1

公开(公告)日：2001-11-13

申请号：US09721148

申请日：2000-11-22

申请人： Jiunn-Ren Hwang ,  I-Hsiung Huang

发明人： Jiunn-Ren Hwang ,  I-Hsiung Huang

IPC分类号： H01L21425

CPC分类号： H01L21/0274 ,  G03F7/0035 ,  Y10S438/947

摘要： A photolithographic process for preventing the rounding of the corners of a pattern. A silicon wafer is provided. A first photoresist layer is formed over the silicon wafer and then patterned to form a first group of mutually parallel photoresist lines along a first direction. A second photoresist layer is formed over the silicon wafer and then patterned to form a second group of mutually parallel photoresist lines along a second direction. The first direction and the second direction are on the same plane but mutually perpendicular.

摘要翻译： 一种用于防止图案的角部倒圆的光刻工艺。 提供硅晶片。 第一光致抗蚀剂层形成在硅晶片之上，然后被图案化以沿着第一方向形成第一组相互平行的光致抗蚀剂线。 第二光致抗蚀剂层形成在硅晶片之上，然后被图案化以沿着第二方向形成第二组相互平行的光致抗蚀剂线。 第一方向和第二方向在同一平面上但相互垂直。