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41.
公开(公告)号:US20130306974A1
公开(公告)日:2013-11-21
申请号:US13952059
申请日:2013-07-26
Applicant: Samsung Display Co., Ltd.
Inventor: Jeong Min PARK , Dong-Won Woo , Je Hyeong Park , Sang Gab Kim , Jung-Soo Lee , Ji-Hyun Kim
IPC: H01L29/786
CPC classification number: H01L29/786 , H01L27/124 , H01L27/1259 , H01L29/78645
Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.
Abstract translation: 薄膜晶体管阵列板的制造方法包括:使用非过氧化物的蚀刻剂,在基板上同时形成栅极导体和第一电极; 在所述栅极导体和所述第一电极上形成栅极绝缘层; 在栅极绝缘层上形成半导体,源电极和漏电极; 在半导体,源电极和漏电极上形成钝化层; 以及在所述钝化层上形成第二电极层。
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42.
公开(公告)号:US11678528B2
公开(公告)日:2023-06-13
申请号:US16953188
申请日:2020-11-19
Applicant: Samsung Display Co., Ltd.
Inventor: Sang Gab Kim , Hyunmin Cho , Taesung Kim , Subin Bae , Yu-Gwang Jeong , Jinseock Kim
CPC classification number: H01L27/3258 , H01L27/3248 , H01L27/3276 , H01L51/5218 , H01L51/56 , H01L27/1288 , H01L51/0018 , H01L2227/323 , H01L2251/558
Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.
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公开(公告)号:US11502144B2
公开(公告)日:2022-11-15
申请号:US16838956
申请日:2020-04-02
Applicant: Samsung Display Co., Ltd.
Inventor: Hyun Min Cho , Tae Wook Kang , Tae Sung Kim , Dae Won Choi , Sang Gab Kim
Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.
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公开(公告)号:US11276580B2
公开(公告)日:2022-03-15
申请号:US16296646
申请日:2019-03-08
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Su Bin Bae , Yu-Gwang Jeong , Shin Il Choi , Sang Gab Kim , Joon Geol Lee
IPC: H01L29/41 , H01L21/311 , H01L21/027 , H01L21/768 , H01L21/763
Abstract: A connecting structure of a conductive layer includes a first conductive layer, a first insulating layer disposed on the first conductive layer and including a first opening overlapping the first conductive layer, a connecting conductor disposed on the first insulating layer and connected to the first conductive layer through the first opening, an insulator island disposed on the connecting conductor, a second insulating layer disposed on the first insulating layer and including a second opening overlapping the connecting conductor and the insulator island, and a second conductive layer disposed on the second insulating layer and connected to a connecting electrode through the second opening. A sum of a thickness of the first insulating layer and a thickness of the second insulating layer is greater than or equal to 1 μm, and each of the thicknesses of the first and second insulating layers is less than 1 μm.
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公开(公告)号:US11127807B2
公开(公告)日:2021-09-21
申请号:US16521394
申请日:2019-07-24
Inventor: Sang Gab Kim , Hyun Min Cho , Tae Sung Kim , Yu-Gwang Jeong , Su Bin Bae , Jin Seock Kim , Sang Gyun Kim , Hyo Min Ko , Kil Won Cho , Hansol Lee
Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.
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公开(公告)号:US10910232B2
公开(公告)日:2021-02-02
申请号:US16106739
申请日:2018-08-21
Applicant: Samsung Display Co., Ltd. , Korea University Research and Business Foundation, Sejong Campus
Inventor: Sang Gab Kim , MunPyo Hong , Hyun Min Cho , Seong Yong Kwon , Ho Won Yoon
IPC: H01L21/3213 , C23F3/04 , H01L21/441 , H01L21/3105 , H01L21/02 , H05K3/06 , H01L23/532 , H01L29/786 , H01L29/49 , H01L21/311 , H01J37/00 , C23F4/00
Abstract: A copper plasma etching method according an exemplary embodiment includes: placing a substrate on a susceptor in a process chamber of a plasma etching apparatus; supplying an etching gas that include hydrogen chloride into the process chamber; plasma-etching a conductor layer that include copper in the substrate; and maintaining a temperature of the susceptor at 10° C. or less during the plasma-etching.
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公开(公告)号:US10811478B2
公开(公告)日:2020-10-20
申请号:US16374706
申请日:2019-04-03
Applicant: Samsung Display Co., Ltd.
Inventor: Dae Won Choi , Tae Wook Kang , Kyeong Su Ko , Sang Gab Kim , Tae Sung Kim , Joon Geol Lee , Hyun Min Cho
Abstract: An organic light-emitting diode display device includes a pixel electrode, a pixel-defining layer, an organic emission layer, and a counter electrode. The pixel-defining layer includes an opening partially exposing the pixel electrode. The organic emission layer is disposed on the pixel electrode. The organic emission layer is disposed in the opening. The counter electrode is disposed on the organic emission layer. The counter electrode opposes the pixel electrode. The pixel-defining layer includes a first pixel-defining layer and a second pixel-defining layer. The first pixel-defining layer is disposed on the pixel electrode and includes an inorganic material. The second pixel-defining layer is disposed on the first pixel-defining layer and includes an organic material. A sidewall of the first pixel-defining layer that is closest to the opening is aligned with a sidewall of the second pixel-defining layer that is closest to the opening.
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公开(公告)号:US10748943B2
公开(公告)日:2020-08-18
申请号:US16124356
申请日:2018-09-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Hyun Min Cho , Shin Il Choi , Kyeong Su Ko , Sang Gab Kim , Joon Geol Lee
IPC: H01L27/12 , H01L29/45 , H01L29/786 , H01L21/3213 , H01L51/50
Abstract: A display device includes: a substrate; first and second transistors provided on the substrate to be spaced apart from each other, the first and second transistors being electrically connected to each other; and a display unit electrically connected to the first transistor, wherein the first transistor includes a first semiconductor layer including crystalline silicon, a first gate electrode, a first source electrode, and a first drain electrode, wherein the second transistor includes a second semiconductor layer including an oxide semiconductor, a second gate electrode, a second source electrode, and a second drain electrode, wherein each of the second source electrode and the second drain electrode includes a first layer that includes molybdenum and is provided on the second semiconductor layer, a second layer that includes aluminum and is provided on the first layer, and a third layer that includes titanium and is provided on the second layer.
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公开(公告)号:US10741589B2
公开(公告)日:2020-08-11
申请号:US16215520
申请日:2018-12-10
Applicant: Samsung Display Co., Ltd.
Inventor: Yu-Gwang Jeong , Hyun Min Cho , Su Bin Bae , Shin Il Choi , Sang Gab Kim
IPC: H01L27/12 , H01L21/311 , H01L29/417 , H01L29/786 , G02F1/1368 , H01L27/32
Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.
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公开(公告)号:US09768309B2
公开(公告)日:2017-09-19
申请号:US15194841
申请日:2016-06-28
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor: Yong Su Lee , Yoon Ho Khang , Dong Jo Kim , Hyun Jae Na , Sang Ho Park , Se Hwan Yu , Chong Sup Chang , Dae Ho Kim , Jae Neung Kim , Myoung Geun Cha , Sang Gab Kim , Yu-Gwang Jeong
IPC: H01L27/00 , H01L29/00 , H01L29/786 , H01L27/12 , H01L29/66 , H01L29/417 , H01L27/32
CPC classification number: H01L29/78633 , H01L27/1225 , H01L27/124 , H01L27/1288 , H01L27/3262 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869 , H01L29/78696
Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.
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