MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL
    41.
    发明申请
    MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL 审中-公开
    薄膜晶体管阵列的制造方法

    公开(公告)号:US20130306974A1

    公开(公告)日:2013-11-21

    申请号:US13952059

    申请日:2013-07-26

    CPC classification number: H01L29/786 H01L27/124 H01L27/1259 H01L29/78645

    Abstract: A manufacturing method of a thin film transistor array panel includes: simultaneously forming a gate conductor and a first electrode on a substrate, using a non-peroxide-based etchant; forming a gate insulating layer on the gate conductor and the first electrode; forming a semiconductor, a source electrode, and a drain electrode on the gate insulating layer; forming a passivation layer on the semiconductor, the source electrode, and the drain electrode; and forming a second electrode layer on the passivation layer.

    Abstract translation: 薄膜晶体管阵列板的制造方法包括:使用非过氧化物的蚀刻剂,在基板上同时形成栅极导体和第一电极; 在所述栅极导体和所述第一电极上形成栅极绝缘层; 在栅极绝缘层上形成半导体,源电极和漏电极; 在半导体,源电极和漏电极上形成钝化层; 以及在所述钝化层上形成第二电极层。

    Display device having tapered partition wall and method of manufacturing the same

    公开(公告)号:US11502144B2

    公开(公告)日:2022-11-15

    申请号:US16838956

    申请日:2020-04-02

    Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.

    Connecting structure of a conductive layer

    公开(公告)号:US11276580B2

    公开(公告)日:2022-03-15

    申请号:US16296646

    申请日:2019-03-08

    Abstract: A connecting structure of a conductive layer includes a first conductive layer, a first insulating layer disposed on the first conductive layer and including a first opening overlapping the first conductive layer, a connecting conductor disposed on the first insulating layer and connected to the first conductive layer through the first opening, an insulator island disposed on the connecting conductor, a second insulating layer disposed on the first insulating layer and including a second opening overlapping the connecting conductor and the insulator island, and a second conductive layer disposed on the second insulating layer and connected to a connecting electrode through the second opening. A sum of a thickness of the first insulating layer and a thickness of the second insulating layer is greater than or equal to 1 μm, and each of the thicknesses of the first and second insulating layers is less than 1 μm.

    Organic light-emitting diode display device and method of fabricating the same

    公开(公告)号:US10811478B2

    公开(公告)日:2020-10-20

    申请号:US16374706

    申请日:2019-04-03

    Abstract: An organic light-emitting diode display device includes a pixel electrode, a pixel-defining layer, an organic emission layer, and a counter electrode. The pixel-defining layer includes an opening partially exposing the pixel electrode. The organic emission layer is disposed on the pixel electrode. The organic emission layer is disposed in the opening. The counter electrode is disposed on the organic emission layer. The counter electrode opposes the pixel electrode. The pixel-defining layer includes a first pixel-defining layer and a second pixel-defining layer. The first pixel-defining layer is disposed on the pixel electrode and includes an inorganic material. The second pixel-defining layer is disposed on the first pixel-defining layer and includes an organic material. A sidewall of the first pixel-defining layer that is closest to the opening is aligned with a sidewall of the second pixel-defining layer that is closest to the opening.

    Display device, manufacturing method thereof, and electrode forming method

    公开(公告)号:US10748943B2

    公开(公告)日:2020-08-18

    申请号:US16124356

    申请日:2018-09-07

    Abstract: A display device includes: a substrate; first and second transistors provided on the substrate to be spaced apart from each other, the first and second transistors being electrically connected to each other; and a display unit electrically connected to the first transistor, wherein the first transistor includes a first semiconductor layer including crystalline silicon, a first gate electrode, a first source electrode, and a first drain electrode, wherein the second transistor includes a second semiconductor layer including an oxide semiconductor, a second gate electrode, a second source electrode, and a second drain electrode, wherein each of the second source electrode and the second drain electrode includes a first layer that includes molybdenum and is provided on the second semiconductor layer, a second layer that includes aluminum and is provided on the first layer, and a third layer that includes titanium and is provided on the second layer.

    Transistor array panel and manufacturing method thereof

    公开(公告)号:US10741589B2

    公开(公告)日:2020-08-11

    申请号:US16215520

    申请日:2018-12-10

    Abstract: A transistor array panel is manufactured by a method that reduces or obviates the need for highly selective etching agents or complex processes requiring multiple photomasks to create contact holes. The panel includes: a substrate; a buffer layer positioned on the substrate; a semiconductor layer positioned on the buffer layer; an intermediate insulating layer positioned on the semiconductor layer; and an upper conductive layer positioned on the intermediate insulating layer, wherein the semiconductor layer includes a first contact hole, the intermediate insulating layer includes a second contact hole positioned in an overlapping relationship with the first contact hole, and the upper conductive layer is in contact with a side surface of the semiconductor layer in the first contact hole.

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