公开(公告)号：US12165845B2

公开(公告)日：2024-12-10

申请号：US18056294

申请日：2022-11-17

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shogo Okita ,  Yoshiyuki Wada ,  Takahiro Miyai ,  Naoaki Takeda ,  Toshihiro Wada ,  Toshiyuki Takasaki

IPC: H01J37/32

Abstract: Disclosed is a plasma processing apparatus 10 including a chamber 11, a stage 12, a dielectric member 13, a cover 14, a gas introduction path 15, and an induction coil 16. The induction coil 16 includes a first induction coil 17 installed so as to overlap a central region R1 of the dielectric member 13, and a second induction coil 18 installed so as to overlap a peripheral region R2 outside the central region R1 of the dielectric member 13. The cover 14 has a first gas hole 14c formed at a position overlapping the central region R1 and a second gas hole 14d formed at a position overlapping the peripheral region R2. The gas introduction path 15 has a first gas introduction path 15a communicating with the first gas hole 14c and a second gas introduction path 15b communicating with the second gas hole 14d.

公开(公告)号：US11688641B2

公开(公告)日：2023-06-27

申请号：US16881165

申请日：2020-05-22

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Hidehiko Karasaki ,  Shogo Okita ,  Atsushi Harikai ,  Akihiro Itou

IPC: H01L21/82 ,  H01L21/56 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/78

CPC classification number: H01L21/82 ,  H01L21/3065 ,  H01L21/31122 ,  H01L21/31127 ,  H01L21/568

Abstract: An element chip manufacturing method including: attaching a substrate via a die attach film (DAF) to a holding sheet; forming a protective film that covers the substrate; forming an opening in the protective film with a laser beam, to expose the substrate in the dicing region therefrom; exposing the substrate to a first plasma to etch the substrate exposed from the opening, so that a plurality of element chips are formed from the substrate and so that the DAF is exposed from the opening; exposing the substrate to a second plasma to etch the die attach film exposed from the opening, so that the DAF is split so as to correspond to the element chips; and detaching the element chips from the holding sheet, together with the split DAF. The DAF is larger than the substrate. The method includes irradiating the laser beam to the DAF protruding from the substrate.

公开(公告)号：US11551974B2

公开(公告)日：2023-01-10

申请号：US17471661

申请日：2021-09-10

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidefumi Saeki ,  Atsushi Harikai ,  Shogo Okita

IPC: H01L21/78 ,  H01L23/544 ,  H01L21/268 ,  B23K26/00 ,  B23K26/364 ,  H01L21/3065

Abstract: A manufacturing process of an element chip comprises a preparing step for preparing a substrate having first and second sides opposed to each other, the substrate containing a semiconductor layer, a wiring layer and a resin layer formed on the first side, and the substrate including a plurality of dicing regions and element regions defined by the dicing regions. Also, the manufacturing process comprises a laser grooving step for irradiating a laser beam onto the dicing regions to form grooves so as to expose the semiconductor layer along the dicing regions. Further, the manufacturing process comprises a dicing step for plasma-etching the semiconductor layer along the dicing regions through the second side to divide the substrate into a plurality of the element chips. The laser grooving step includes a melting step for melting a surface of the semiconductor layer exposed along the dicing regions.

公开(公告)号：US10896849B2

公开(公告)日：2021-01-19

申请号：US16426116

申请日：2019-05-30

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Hidehiko Karasaki ,  Shogo Okita ,  Noriyuki Matsubara ,  Hidefumi Saeki

IPC: H01L21/78 ,  B23K26/40 ,  H01L21/3065 ,  B23K26/364 ,  H01L21/308 ,  H01L21/02 ,  B23K101/40

Abstract: A substrate has first and second surfaces, and includes a plurality of element regions and dividing region defining the element regions. A method for manufacturing an element chip includes: a step of spray coating, to the first surface of the substrate, a mixture containing a water-soluble resin and an organic solvent having a higher vapor pressure than water, and drying the coated mixture at a temperature of 50° C. or less, to form a protective film; a laser grooving step of removing portions of the protective film covering the dividing regions; a step of dicing the substrate into element chips by plasma etching the substrate; and a step of removing the portions of the protective film covering the element regions. The mixture has a solid component ratio of 200 g/L or more, and droplets of the sprayed mixture have an average particle size of 12 μm or less.

公开(公告)号：US10818553B2

公开(公告)日：2020-10-27

申请号：US16280160

申请日：2019-02-20

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shogo Okita

IPC: H01L21/78 ,  H01L21/683 ,  H01L21/66 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/02 ,  H01L21/3213 ,  H01L21/311 ,  H01L21/82 ,  H01L21/308 ,  H01L21/782 ,  H01L21/67

Abstract: The method for manufacturing an element chip includes: sticking an adhesive tape having translucency to a front surface of a semiconductor wafer; measuring a position and a width of a second close contact portion in a dividing region; applying a laser beam having a beam diameter smaller than the width of the second close contact portion to the adhesive tape such that the laser beam does not protrude from the second close contact portion based on the width of the second close contact portion and the beam diameter, and forming an exposed portion; exposing the front surface to plasma with a back surface held by a dicing tape, and while protecting an element region from the plasma with an adhesive tape, etching the dividing region exposed in the exposed portion to dice the substrate into a plurality of element chips; and removing the adhesive tape remaining on the front surface.

公开(公告)号：US10763124B2

公开(公告)日：2020-09-01

申请号：US16194547

申请日：2018-11-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Noriyuki Matsubara ,  Shogo Okita ,  Hidehiko Karasaki

IPC: H01L21/20 ,  H01L21/306 ,  G03F7/038 ,  G03F7/40 ,  H01L21/78 ,  H01L29/06 ,  H01L21/311 ,  H01L23/00 ,  H01L21/67 ,  H01L21/3065 ,  H01L21/82 ,  H01L21/3213 ,  H01L21/02 ,  H01L21/308 ,  H01L21/683 ,  H01J37/00

Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including a plurality of dicing regions and element regions each containing a plurality of convex and concave portions, holding the substrate and a frame with a holding sheet, forming a protective film by applying a first mixture to form a coated film above the substrate and by drying the coated film to form the protective film along the convex and concave portions, the first mixture containing a first resin and an organic solvent having a vapor pressure higher than water, removing the protective film by irradiating a laser beam thereon to expose the substrate in the dicing regions, plasma-etching the substrate along the dicing regions while maintaining the protective film in the element regions to individualize the substrate, and removing the protective film by contacting the protective film with an aqueous rinse solution.

公开(公告)号：US10424488B2

公开(公告)日：2019-09-24

申请号：US16009352

申请日：2018-06-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shogo Okita ,  Atsushi Harikai

IPC: H01L21/3065 ,  H01L21/308 ,  H01L21/677 ,  H01L21/78 ,  H01L21/67 ,  H01L21/683 ,  H01L21/687

Abstract: The yield of a product is improved when a substrate held by a conveyance carrier is subjected to a plasma treatment. A method of manufacturing an electronic component includes preparing a substrate which is bonded to a holding sheet of a conveyance carrier, the conveyance carrier including the holding sheet and a frame disposed on an outer peripheral portion of the holding sheet, the substrate having a circuit layer; heating the holding sheet after preparing the substrate; cooling the holding sheet after heating the holding sheet; and plasma etching the substrate to singulate the substrate into the electronic component in a state that the substrate is placed above a stage included in a plasma treatment apparatus and the substrate is in contact with the stage via the holding sheet.

公开(公告)号：US20190157100A1

公开(公告)日：2019-05-23

申请号：US16194547

申请日：2018-11-19

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi HARIKAI ,  Noriyuki Matsubara ,  Shogo Okita ,  Hidehiko Karasaki

IPC: H01L21/311 ,  H01L23/00 ,  H01L21/3213 ,  H01L21/3065 ,  H01L21/82 ,  H01L21/67

Abstract: A manufacturing process of an element chip comprises steps of preparing a substrate including a plurality of dicing regions and element regions each containing a plurality of convex and concave portions, holding the substrate and a frame with a holding sheet, forming a protective film by applying a first mixture to form a coated film above the substrate and by drying the coated film to form the protective film along the convex and concave portions, the first mixture containing a first resin and an organic solvent having a vapor pressure higher than water, removing the protective film by irradiating a laser beam thereon to expose the substrate in the dicing regions, plasma-etching the substrate along the dicing regions while maintaining the protective film in the element regions to individualize the substrate, and removing the protective film by contacting the protective film with an aqueous rinse solution.

公开(公告)号：US10276423B2

公开(公告)日：2019-04-30

申请号：US15893999

申请日：2018-02-12

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shogo Okita ,  Koji Tamura ,  Akihiro Itou ,  Atsushi Harikai ,  Noriyuki Matsubara

IPC: H01L21/683 ,  H01L21/78 ,  H01L21/308 ,  H01L21/3065 ,  H01L23/00

Abstract: A method of manufacturing a semiconductor chip includes: preparing a semiconductor wafer; forming a mask on a front surface of the semiconductor wafer so as to cover each of the element regions and to expose the dividing region; exposing the front surface to plasma in a state where a back surface of the semiconductor wafer is held with a dicing tape to dice the semiconductor wafer into a plurality of semiconductor chips by etching the dividing region exposed from the mask up to the back surface while protecting each of the element regions with the mask from plasma; and removing the mask from the front surface together with an adhesive tape by peeling off the adhesive tape after sticking the adhesive tape to the side of the front surface.

公开(公告)号：US10049933B2

公开(公告)日：2018-08-14

申请号：US15594690

申请日：2017-05-15

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Shogo Okita ,  Akihiro Itou ,  Katsumi Takano ,  Mitsuru Hiroshima

IPC: H01L21/78 ,  H01L21/3065 ,  H01L21/683 ,  H01L23/00 ,  H01L21/302 ,  H01L21/304

Abstract: An element chip manufacturing method includes a preparation process of preparing a substrate which includes a first surface provided with a bump and a second surface and includes a plurality of element regions defined by dividing regions, a bump embedding process of adhering a protection tape having an adhesive layer to the first surface and embedding. The element chip manufacturing method includes a thinning process of grinding the second surface in a state where the protection tape is adhered to the first surface and thinning the substrate, after the bump embedding process, a mask forming process of forming a mask in the second surface and exposes the dividing regions, after the thinning process, a holding process of arranging the first surface to oppose a holding tape supported on a frame and holding the substrate on the holding tape.