公开(公告)号：US20160330392A1

公开(公告)日：2016-11-10

申请号：US14707572

申请日：2015-05-08

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Johannes Solhusvik ,  Howard E. Rhodes ,  Jie Shen

IPC: H04N5/378 ,  H04N5/369 ,  H04N5/3745

CPC classification number: H04N5/37457

Abstract: An image sensor includes a pixel array disposed in a first semiconductor die. The pixel array is partitioned into a plurality of pixel sub-arrays. Each one of the plurality of pixel sub-arrays is arranged into a plurality of pixel groups. Each one of the plurality of pixel groups is arranged into a p×q array of pixel cells. A plurality of readout circuits is disposed in a second semiconductor die. An interconnect layer is stacked between the first semiconductor die and the second semiconductor die. The interconnect layer includes a plurality of conductors. Each one of the plurality of pixel sub-arrays is coupled to a corresponding one of the plurality of readout circuits through a corresponding one of the plurality of conductors.

Abstract translation: 图像传感器包括设置在第一半导体管芯中的像素阵列。 像素阵列被划分为多个像素子阵列。 多个像素子阵列中的每一个被排列成多个像素组。 多个像素组中的每一个被排列成像素单元的p×q阵列。 多个读出电路设置在第二半导体管芯中。 互连层堆叠在第一半导体管芯和第二半导体管芯之间。 互连层包括多个导体。 多个像素子阵列中的每一个通过多个导体中的相应一个耦合到多个读出电路中的对应的一个。

公开(公告)号：US20160027837A1

公开(公告)日：2016-01-28

申请号：US14341257

申请日：2014-07-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Eric A. G. Webster ,  Howard E. Rhodes ,  Dominic Massetti

IPC: H01L27/146 ,  H01L31/028

CPC classification number: H01L27/14645 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/1463 ,  H01L27/14632 ,  H01L27/14649 ,  H01L27/14652 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689 ,  H01L31/028

Abstract: A pixel array including an SixGey layer disposed on a first semiconductor layer. A plurality of pixels is disposed in the first semiconductor layer. The plurality of pixels includes: (1) a first portion of pixels separated from the SixGey layer by a spacer region and (2) a second portion of pixels including a first doped region in contact with the SixGey layer. The pixel array also includes pinning wells disposed between individual pixels in the plurality of pixels. A first portion of the pinning wells extend through the first semiconductor layer. A second portion of the pinning wells extend through the first semiconductor layer and the SixGey layer.

Abstract translation: 包括设置在第一半导体层上的SixGey层的像素阵列。 多个像素设置在第一半导体层中。 多个像素包括：（1）通过间隔区域与SixGey层分离的像素的第一部分和（2）包括与SixGey层接触的第一掺杂区域的像素的第二部分。 像素阵列还包括设置在多个像素中的各个像素之间的钉扎阱。 钉扎井的第一部分延伸穿过第一半导体层。 钉扎阱的第二部分延伸穿过第一半导体层和SixGey层。

公开(公告)号：US09147776B2

公开(公告)日：2015-09-29

申请号：US14331646

申请日：2014-07-15

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Howard E. Rhodes ,  Dajiang Yang ,  Gang Chen ,  Duli Mao ,  Vincent Venezia

IPC: H01L27/146 ,  H01L31/0224 ,  H01L31/103

CPC classification number: H01L31/0224 ,  H01L27/14609 ,  H01L27/1462 ,  H01L27/14643 ,  H01L31/103

Abstract: An image sensor pixel includes a photodiode region having a first polarity doping type disposed in a semiconductor layer. A pinning surface layer having a second polarity doping type is disposed over the photodiode region in the semiconductor layer. The second polarity is opposite from the first polarity. A first polarity charge layer is disposed proximate to the pinning surface layer over the photodiode region. A contact etch stop layer is disposed over the photodiode region proximate to the first polarity charge layer. The first polarity charge layer is disposed between the pinning surface layer and the contact etch stop layer such that first polarity charge layer cancels out charge having a second polarity that is induced in the contact etch stop layer. A passivation layer is also disposed over the photodiode region between the pinning surface layer and the first polarity charge layer.

Abstract translation: 图像传感器像素包括设置在半导体层中的具有第一极性掺杂型的光电二极管区域。 具有第二极性掺杂型的钉扎表面层设置在半导体层中的光电二极管区域的上方。 第二极性与第一极性相反。 第一极性电荷层设置在光电二极管区域附近的钉扎表面层附近。 接触蚀刻停止层设置在靠近第一极性电荷层的光电二极管区域的上方。 第一极性电荷层设置在钉扎表面层和接触蚀刻停止层之间，使得第一极性电荷层抵消在接触蚀刻停止层中感应的具有第二极性的电荷。 钝化层也设置在钉扎表面层和第一极性电荷层之间的光电二极管区域之上。

公开(公告)号：US20140239351A1

公开(公告)日：2014-08-28

申请号：US13777197

申请日：2013-02-26

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Duli Mao ,  Hsin-Chih Tai ,  Vincent Venezia ,  Yin Qian ,  Howard E. Rhodes

IPC: H01L27/146

CPC classification number: H01L27/14689 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/14643

Abstract: Embodiments of a process including depositing a sacrificial layer on the surface of a substrate over a photosensitive region, over the top surface of a transfer gate, and over at least the sidewall of the transfer gate closest to the photosensitive region, the sacrificial layer having a selected thickness. A layer of photoresist is deposited over the sacrificial layer, which is patterned and etched to expose the surface of the substrate over the photosensitive region and at least part of the transfer gate top surface, leaving a sacrificial spacer on the sidewall of the transfer gate closest to the photosensitive region. The substrate is plasma doped to form a pinning layer between the photosensitive region and the surface of the substrate. The spacing between the pinning layer and the sidewall of the transfer gate substantially corresponds to a thickness of the sacrificial spacer. Other embodiments are disclosed and claimed.

Abstract translation: 一种方法的实施方案包括在光敏区域上方的基底表面上沉积牺牲层，在转移栅极的顶表面上，以及至少最靠近光敏区域的转移栅极的侧壁上，牺牲层具有 选择厚度。 在牺牲层上沉积一层光致抗蚀剂，其被图案化和蚀刻以在基片的表面上在感光区域和至少部分传输栅极顶表面上露出基底表面，在传输门的侧壁上留下牺牲隔离物 到感光区域。 衬底是等离子体掺杂的，以在光敏区域和衬底的表面之间形成钉扎层。 钉扎层和转移门的侧壁之间的间隔基本上对应于牺牲间隔物的厚度。 公开和要求保护其他实施例。

公开(公告)号：US20140124889A1

公开(公告)日：2014-05-08

申请号：US13669107

申请日：2012-11-05

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Yin Qian ,  Hsin-Chih Tai ,  Tiejun Dai ,  Duli Mao ,  Cunyu Yang ,  Howard E. Rhodes

IPC: H01L27/146 ,  H01L21/30 ,  H01L31/18 ,  H01L23/52

CPC classification number: H01L27/1469 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/585 ,  H01L24/05 ,  H01L24/08 ,  H01L24/94 ,  H01L27/14618 ,  H01L27/14636 ,  H01L27/14683 ,  H01L27/14689 ,  H01L2224/04042 ,  H01L2224/05567 ,  H01L2224/08145 ,  H01L2224/80896 ,  H01L2224/9202 ,  H01L2224/9212 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/10329 ,  H01L2924/12043 ,  H01L2924/1434 ,  H01L2924/37001 ,  H01L2224/80 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/8203 ,  H01L2224/821 ,  H01L2224/80001 ,  H01L2224/82

Abstract: An integrated circuit system includes a first device wafer bonded to a second device wafer at a bonding interface of dielectrics. Each wafer includes a plurality of dies, where each die includes a device, a metal stack, and a seal ring that is formed at an edge region of the die. Seal rings included in dies of the second device wafer each include a first conductive path provided with metal formed in a first opening that extends from a backside of the second device wafer, through the second device wafer, and through the bonding interface to the seal ring of a corresponding die in the first device wafer.

Abstract translation: 集成电路系统包括在电介质的接合界面处结合到第二器件晶片的第一器件晶片。 每个晶片包括多个模具，其中每个模具包括形成在模具的边缘区域处的装置，金属堆叠和密封环。 包括在第二器件晶片的管芯中的密封圈各自包括设置有金属的第一导电路径，所述第一导电路径形成在从第二器件晶片的背面延伸穿过第二器件晶片的第一开口中，并且通过接合界面到达密封环 在第一器件晶片中的相应管芯。

公开(公告)号：US20140103189A1

公开(公告)日：2014-04-17

申请号：US13651092

申请日：2012-10-12

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Duli Mao ,  Hsin-Chih Tai ,  Howard E. Rhodes

IPC: H01L27/148 ,  H01L31/00

CPC classification number: H01L27/14612 ,  H04N5/3559

Abstract: Embodiments of the invention describe providing a compact solution to provide high dynamic range imaging (HDRI or simply HDR) for an imaging pixel by utilizing a control node for resetting a floating diffusion node to a reference voltage value and for selectively transferring an image charge from a photosensitive element to a readout node. Embodiments of the invention further describe control node to have to a plurality of different capacitance regions to selectively increase the overall capacitance of the floating diffusion node. This variable capacitance of the floating diffusion node increases the dynamic range of the imaging pixel, thereby providing HDR for the host imaging system, as well as increasing the signal-to-noise ratio (SNR) of the imaging system.

Abstract translation: 本发明的实施例描述了提供一种紧凑的解决方案，以通过利用用于将浮动扩散节点复位到参考电压值的控制节点和用于选择性地传输图像电荷的方法来为成像像素提供高动态范围成像（HDRI或简单的HDR） 感光元件到读出节点。 本发明的实施例进一步描述了控制节点必须具有多个不同的电容区域以选择性地增加浮动扩散节点的整体电容。 浮动扩散节点的这种可变电容增加了成像像素的动态范围，从而为主机成像系统提供了HDR，并且提高了成像系统的信噪比（SNR）。

公开(公告)号：US20130285183A1

公开(公告)日：2013-10-31

申请号：US13927495

申请日：2013-06-26

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Gang Chen ,  Ashish Shah ,  Duli Mao ,  Hsin-Chih Tai ,  Howard E. Rhodes

IPC: H01L27/146

CPC classification number: H01L27/14645 ,  H01L27/14605 ,  H01L27/1462 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/1469

Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate).In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.

公开(公告)号：US20130033629A1

公开(公告)日：2013-02-07

申请号：US13650056

申请日：2012-10-11

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Wei Zheng ,  Hsin-Chih Tai ,  Yin Qian ,  Hongjun Li ,  Howard E. Rhodes

IPC: H04N5/335 ,  H04N5/225

CPC classification number: H04N5/361 ,  H01L27/1461 ,  H01L27/14634 ,  H01L27/1464 ,  H04N5/3745

Abstract: An imaging system capable of black level calibration includes an imaging pixel array, at least one black reference pixel, and peripheral circuitry. The imaging pixel array includes a plurality of active pixels each coupled to capture image data. The black reference pixel is coupled to generate a black reference signal for calibrating the image data. Light transmitting layers are disposed on a first side of a pixel array die including the imaging system and cover at least the imaging pixel array and the black reference pixel. A light shielding layer is disposed on the first side of the pixel array die and covers a portion of the light transmitting layers and the black reference pixel without covering the imaging pixel array.

Abstract translation: 能够进行黑电平校准的成像系统包括成像像素阵列，至少一个黑色参考像素和外围电路。 成像像素阵列包括多个有源像素，每个有源像素被耦合以捕获图像数据。 黑参考像素被耦合以产生用于校准图像数据的黑参考信号。 光透射层设置在包括成像系统的像素阵列管芯的第一侧，并且至少覆盖成像像素阵列和黑色参考像素。 遮光层设置在像素阵列管芯的第一侧上，并且覆盖透光层和黑色参考像素的一部分而不覆盖成像像素阵列。