Abstract:
A photomultiplier pixel cell includes a photon detector coupled to detect an incident photon. A quenching circuit is coupled to quench an avalanche current in the photon detector. An enable circuit is coupled to the photon detector to enable and disable the photon detector in response to an enable signal. A buffer circuit is coupled to the photon detector to generate a digital output signal having a pulse width interval in response to the avalanche current triggered in the photon detector. A first one of a plurality of inputs of a digital-to-analog converter is coupled to the buffer circuit to receive a digital output signal. The digital-to-analog converter is coupled to generate an analog output signal having a magnitude that is responsive to a total number of digital output signals received concurrently within the pulse width interval at each one of the plurality of inputs of the digital-to-analog converter.
Abstract:
A method of image sensor fabrication includes forming a second semiconductor layer on a back side of a first semiconductor layer. The method also includes forming one or more groups of pixels disposed in a front side of the first semiconductor layer. The one or more groups of pixels include a first portion of pixels separated from the second semiconductor layer by a spacer region, and a second portion of pixels, where a first doped region of the second portion of pixels is in contact with the second semiconductor layer. Pinning wells are also formed and separate individual pixels in the one or more groups of pixels, and the pinning wells extend through the first semiconductor layer. Deep pinning wells are also formed and separate the one or more groups of pixels.
Abstract:
A photon detection device includes a first wafer having an array of photon detection cells partitioned into a plurality of photon detection blocks arranged in the first wafer. A second wafer having a plurality of block readout circuits arranged thereon is also included. An interconnect wafer is disposed between the first wafer and the second wafer. The interconnect wafer includes a plurality of conductors having substantially equal lengths. Each one of the plurality of conductors is coupled between a corresponding one of the plurality of photon detection blocks in the first wafer and a corresponding one of the plurality of block readout circuits such that signal propagation delays between each one of the plurality of photon detection blocks and each one of the plurality of block readout circuits are substantially equal.
Abstract:
An avalanche photodiode sensor includes a plurality of avalanche photodiodes disposed in a semiconductor material where individual avalanche photodiodes in the plurality of avalanche photodiodes have an internal electric field parallel with a first surface of the semiconductor material. The individual avalanche photodiodes in the plurality of avalanche photodiodes include a p-doped semiconductor region which extends into the semiconductor material, and an n-doped semiconductor region which extends into the semiconductor material. The internal electric field extends between the p-doped semiconductor region and the n-doped semiconductor region. Processing methods as examples are also proposed.
Abstract:
A pixel array including an SixGey layer disposed on a first semiconductor layer. A plurality of pixels is disposed in the first semiconductor layer. The plurality of pixels includes: (1) a first portion of pixels separated from the SixGey layer by a spacer region and (2) a second portion of pixels including a first doped region in contact with the SixGey layer. The pixel array also includes pinning wells disposed between individual pixels in the plurality of pixels. A first portion of the pinning wells extend through the first semiconductor layer. A second portion of the pinning wells extend through the first semiconductor layer and the SixGey layer.
Abstract:
A photon detector includes a single photon avalanche diode (SPAD) disposed proximate to a front side of a semiconductor layer. The SPAD includes a multiplication junction that is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the semiconductor layer triggers an avalanche multiplication process. A guard ring is disposed in a guard ring region that surrounds the SPAD to isolate the SPAD in the semiconductor layer. A guard ring region reflecting structure is disposed in the guard ring region proximate to the guard ring and proximate to the front side of the semiconductor layer such that light directed into the guard ring region through the backside of the semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the semiconductor layer and into the SPAD.
Abstract:
A time-of-flight (TOF) pixel includes a semiconductor material and a photogate disposed proximate to a frontside of the semiconductor material. The photogate is positioned to transfer charge in the semiconductor material toward the frontside in response to a voltage applied to the photogate. A floating diffusion is disposed in the semiconductor material proximate to the frontside of the semiconductor material, and one or more virtual phase implants is disposed in the semiconductor material proximate to the frontside of the semiconductor material. At least one of the one or more virtual phase implants extend laterally from under the photogate to the floating diffusion to transfer the charge to the floating diffusion.
Abstract:
A time of flight camera includes a light source, a first pixel, a time-to-digital converting, and a controller. The light source is configured to emit light towards an object to be reflected back to the time of flight camera as image light. The first pixel includes a photodetector to detect the image light and to convert the image light into an electric signal. The time-to-digital converter is configured to generate timing signals representative of when the light source emits the light and when the photodetector detects the image light. The controller is coupled to the light source, the first pixel, and the time-to-digital converter. The controller includes logic that when executed causes the time of flight camera to perform operations. The operations include determining a detection window for a round-trip time of the image light based, at least in part, on the timing signals and first pulses of the light. The operations also include determining the round-trip time based, at least in part, on the timing signals and second pulses of the light detected within the detection window.
Abstract:
An imaging sensor system includes a single photon avalanche diode (SPAD) imaging array including N pixels formed in a first semiconductor layer of a first wafer. Substantially an entire thickness of the first semiconductor layer of each pixel is fully depleted such that a multiplication region included in each pixel near a front side is configured to be illuminated with photons through a back side and through the substantially entire thickness of the fully depleted first semiconductor layer. Deep n type isolation regions are disposed in the first semiconductor layer between the pixels to isolate the pixels. N digital counters are formed in a second semiconductor layer of a second wafer that is bonded to the first wafer. Each of the N digital counters is coupled to the SPAD imaging array and coupled to count output pulses generated by a respective one of the pixels.
Abstract:
A photon detector includes a single photon avalanche diode (SPAD) disposed proximate to a front side of a semiconductor layer. The SPAD includes a multiplication junction that is reversed biased above a breakdown voltage such that light directed into the SPAD through a backside of the semiconductor layer triggers an avalanche multiplication process. A guard ring is disposed in a guard ring region that surrounds the SPAD to isolate the SPAD in the semiconductor layer. A guard ring region reflecting structure is disposed in the guard ring region proximate to the guard ring and proximate to the front side of the semiconductor layer such that light directed into the guard ring region through the backside of the semiconductor layer that bypasses the SPAD is redirected by the guard ring region reflecting structure back into the semiconductor layer and into the SPAD.