知搜-全球专利检索

  1. Login
  2. Sign Up

Search Results

62 records (took 0.016 seconds)

    Mixer amplifier and radiofrequency front-end circuit
    41.
    发明申请
    Mixer amplifier and radiofrequency front-end circuit 有权
    混频器放大器和射频前端电路

    公开(公告)号：US20080042726A1

    公开(公告)日：2008-02-21

    申请号：US11818903

    申请日：2007-06-15

    Applicant: Didier Belot ,  Francesco Svelto ,  Marco Sosio ,  Massimo Brandolini

    Inventor： Didier Belot ,  Francesco Svelto ,  Marco Sosio ,  Massimo Brandolini

    IPC: G06G7/16

    CPC classification number: H03D7/1441 ,  H03D7/1458 ,  H03D7/1483 ,  H03D7/1491

    Abstract: The mixer amplifier includes an amplification stage having a current source circuit and a plug filter adapted to modify the current circulating in the current source circuit. The amplification stage and a mixer stage amplify an incoming signal and transpose the frequency of the signal to a predetermined frequency. Resistors pairs measure the imbalance between two branches and have a relatively high value (thus creating a high-pass filter). When the branches are perfectly balanced, the voltage tapped by the non-inverting terminal of the operational amplifier A is zero. During an imbalance, this voltage rises. The output of the amplifier drives the TNP transistor T9, causing current to flow into branches to solicit the transistors T7 or T8 of the current source circuits and thus return the two branches to balance. Accordingly, a balance is maintained between the two branches by providing a feedback within the mixer amplifier.

    Abstract translation: 混频器放大器包括具有电流源电路和适于修改在电流源电路中循环的电流的插头滤波器的放大级。 放大级和混频器级放大输入信号并将信号的频率转换到预定频率。 电阻对测量两个分支之间的不平衡，并具有相对较高的值（从而创建高通滤波器）。 当分支完全平衡时，运算放大器A的同相端子抽头的电压为零。 在不平衡状态下，电压上升。 放大器的输出驱动TNP晶体管T9，使电流流入分支以吸引电流源电路的晶体管T 7或T 8，从而使两个分支返回平衡。 因此，通过在混频放大器内提供反馈来在两个分支之间保持平衡。

    Phase locked loop
    42.
    发明授权
    Phase locked loop 有权
    锁相环

    公开(公告)号：US07315214B2

    公开(公告)日：2008-01-01

    申请号：US11400062

    申请日：2006-04-07

    Applicant: Franck Badets ,  Didier Belot ,  Vincent Lagareste ,  Yann Deval ,  Pierre Melchior ,  Jean-Baptiste Begueret

    Inventor： Franck Badets ,  Didier Belot ,  Vincent Lagareste ,  Yann Deval ,  Pierre Melchior ,  Jean-Baptiste Begueret

    IPC: H03L7/00 ,  H03L7/07 ,  H03L7/087

    CPC classification number: H03L7/093 ,  H03L7/087 ,  H03L7/0893 ,  H03L7/18 ,  H03L2207/06

    Abstract: A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.

    Abstract translation: 锁相环包括用于以确定的输出频率输出输出信号的受控振荡器和用于将输出信号转换为分频的信号的可变分频器。 PLL被称为复合，因为它包括至少一个具有环路滤波器的第一环路，该环路滤波器基于分频频率的信号产生用于振荡器的第一控制信号，以及具有不同于环路的环路滤波器的第二环路 滤波器，用于基于分频后的信号产生用于对振荡器进行附加控制的第二信号。 第一回路的环路滤波器和第二回路的环路滤波器具有不同的各自的截止频率。 第一个环路的通带可以适应于确保PLL的收敛和稳定性，而第二个环路可以提供额外的通带，在修改输出预置值的情况下可以提高PLL的自适应速度 频率。

    A-AB transconductor
    44.
    发明申请
    A-AB transconductor 失效
    A-AB跨导体

    公开(公告)号：US20070188215A1

    公开(公告)日：2007-08-16

    申请号：US11649341

    申请日：2007-01-03

    Applicant: Didier Belot ,  Pascal Persechini

    Inventor： Didier Belot ,  Pascal Persechini

    IPC: G06G7/24

    CPC classification number: H03F1/32 ,  H03F1/302 ,  H03F2200/294 ,  H03F2200/372

    Abstract: A transconductor including circuitry for automatically selecting a non-linear class A operation or a linear class AB operation based on an input signal to be processed to generate an output signal, and for automatically adjusting current from a power supply to a level needed for operation of the transconductor.

    Abstract translation: 一种跨导体，包括用于基于待处理的输入信号自动选择非线性A类操作或线性AB类操作的电路，以产生输出信号，并且用于自动调节从电源到达操作所需的电平 跨导体。

    Integrated electronic circuit comprising a tunable resonator
    45.
    发明授权
    Integrated electronic circuit comprising a tunable resonator 有权
    包括可调谐谐振器的集成电子电路

    公开(公告)号：US07187240B2

    公开(公告)日：2007-03-06

    申请号：US11025781

    申请日：2004-12-29

    Applicant: Andreia Cathelin ,  Stephane Razafimandimby ,  Didier Belot ,  Jean-François Carpentier

    Inventor： Andreia Cathelin ,  Stephane Razafimandimby ,  Didier Belot ,  Jean-François Carpentier

    IPC: H03B5/32 ,  H03L1/02 ,  H03L7/00 ,  H03L7/099

    CPC classification number: H03L7/0805 ,  H03B5/366 ,  H03H2009/02204 ,  H03J3/185 ,  H03J3/20 ,  H03J3/22 ,  H03J3/24 ,  H03L5/00 ,  H03L7/00 ,  H03L7/099

    Abstract: An integrated electronic circuit comprises at least first and second variable resonator elements that can be tuned by means of an electric signal (Vtune) and that are arranged on the same silicon substrate, and that are respectively integrated into a Master circuit and a Slave circuit. Each resonator element is associated with a first inductive partner element set in the vicinity of the resonant and antiresonant frequencies; and with a second capacitive partner element, at least one of said partner elements being adjustable by means of said electric signal (Vtune). Controlling both partner elements could be done either by means of an adjustable capacitor, as a varactor, or by means of an inductor, passive or active, fixed or variable.

    Abstract translation: 集成电子电路包括至少第一和第二可变谐振器元件，其可以通过电信号（V调谐）进行调谐，并且被布置在相同的硅衬底上，并且分别集成到 主电路和从电路。 每个谐振器元件与在谐振和反谐振频率附近设置的第一感应对象元件相关联; 并且利用第二电容性伙伴元件，所述对方元件中的至少一个可通过所述电信号（V调谐）调节。 控制两个伙伴元素可以通过可调电容器，变容二极管或通过电感器，被动或主动，固定或可变的方式完成。

    Receiver for an integrated heterodyne communication system including BAW-type resonators
    47.
    发明申请
    Receiver for an integrated heterodyne communication system including BAW-type resonators 有权
    用于集成外差通信系统的接收机，包括BAW型谐振器

    公开(公告)号：US20050266823A1

    公开(公告)日：2005-12-01

    申请号：US11125291

    申请日：2005-05-09

    Applicant: Andreia Cathelin ,  Didier Belot

    Inventor： Andreia Cathelin ,  Didier Belot

    IPC: H03H7/01 ,  H03H9/74 ,  H04B1/10 ,  H04B1/26 ,  H04B1/28 ,  H04B1/06 ,  H04B15/00

    CPC classification number: H03H7/0169 ,  H03H9/74 ,  H04B1/28

    Abstract: A heterodyne receiving circuit for a digital communication system including a first band pass filter receiving a signal from an antenna, an amplifying circuit and a second narrow band pass filter for selecting one particular channel within a band of frequencies. The two filters are carried out with integrated BAW-type tunable resonators which can be adjusted, respectively, by a first electrical signal and a second electrical signal generated by two PLL-type frequency control loops. The second frequency control loop has a variable division factor for the purpose of selecting one particular channel within said band of frequencies. In addition, the receiving circuit includes a mixer for mixing the signal generated at the output of said second filter with a local oscillation frequency in order to produce an intermediate frequency. The division factor is controlled by a digital processing of the intermediate frequency.

    Abstract translation: 一种用于数字通信系统的外差接收电路，包括接收来自天线的信号的第一带通滤波器，放大电路和用于选择频带内的一个特定信道的第二窄带通滤波器。 两个滤波器由集成的BAW型可调谐谐振器进行，分别可以通过由两个PLL型频率控制回路产生的第一电信号和第二电信号来调节。 第二频率控制回路具有可变分频因子，用于选择所述频带内的一个特定信道。 此外，接收电路包括用于将在所述第二滤波器的输出处产生的信号与本地振荡频率混合的混频器，以便产生中频。 分频因子由中频数字处理控制。

    Electronic signal amplifier and method and article for determining the gain of such an amplifier
    48.
    发明申请
    Electronic signal amplifier and method and article for determining the gain of such an amplifier 有权
    电子信号放大器以及用于确定这种放大器增益的方法和文章

    公开(公告)号：US20050189994A1

    公开(公告)日：2005-09-01

    申请号：US11047475

    申请日：2005-01-31

    Applicant: Didier Belot

    Inventor： Didier Belot

    IPC: H03F1/18 ,  H03F3/60 ,  H03F3/68

    CPC classification number: H03F3/607 ,  H03F1/18 ,  H03F2200/294 ,  H03F2200/372

    Abstract: An embodiment of an electronic signal amplifier comprises a power source, an input inductor, an output inductor and one or more branches connected in parallel between the terminals of the power source. Each branch comprises a transistor having a control electrode connected to an intermediate terminal of the input inductor, a first main electrode connected to a first terminal of the power source, and a second main electrode connected to a second terminal of the power source via a capacitor. The second main electrode of each transistor of a branch is also connected to an intermediate terminal of the output inductor.

    Abstract translation: 电子信号放大器的实施例包括电源，输入电感器，输出电感器以及在电源的端子之间并联连接的一个或多个分支。 每个分支包括具有连接到输入电感器的中间端子的控制电极的晶体管，连接到电源的第一端子的第一主电极和经由电容器连接到电源的第二端子的第二主电极 。 分支的每个晶体管的第二主电极也连接到输出电感器的中间端子。

    RADIOFREQUENCY SIGNAL POWER AMPLIFICATION METHOD AND DEVICE
    50.
    发明申请
    RADIOFREQUENCY SIGNAL POWER AMPLIFICATION METHOD AND DEVICE 有权
    无线电信号功率放大方法和装置

    公开(公告)号：US20110018637A1

    公开(公告)日：2011-01-27

    申请号：US12841803

    申请日：2010-07-22

    Applicant: Didier Belot ,  Laurent Leyssenne ,  Eric Kerherve ,  Yann Deval

    Inventor： Didier Belot ,  Laurent Leyssenne ,  Eric Kerherve ,  Yann Deval

    IPC: H03G3/30 ,  H03F3/04

    CPC classification number: H03F3/245 ,  H03F1/0266 ,  H03F1/0272 ,  H03F2200/102 ,  H03F2200/451

    Abstract: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.

    Abstract translation: 射频信号功率放大电路可以包括用于接收射频信号的信号输入，耦合到信号输入并具有至少一个功率晶体管的放大级，用于将偏置电压传送到放大级的偏置级，以及处理级 。 处理阶段可以包括耦合到信号输入的处理输入，用于将至少以幅度调制的偏置电流传送到偏置级的处理输出以及耦合在处理输入和处理输出之间的幅度调制器，并被配置为确定 信号代表射频信号的包络线，用于基于可变电压设定点调制包络信号的幅度，并且用于基于经调制的包络信号产生幅度调制的偏置电流。

Patent Agency Ranking