公开(公告)号：US20170192321A1

公开(公告)日：2017-07-06

申请号：US15229601

申请日：2016-08-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Shi Shu ,  Zhanfeng Cao ,  Bin Zhang ,  Xiaolong He ,  Qi Yao ,  Jincheng Gao ,  Feng Guan ,  Xuefei Sun

IPC: G02F1/1362 ,  H01L21/02 ,  H01L27/12

CPC classification number: G02F1/136209 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/1259

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The method includes the following operations: forming a light shielding layer formed of a metal blacken production on a base substrate, wherein the metal blacken production is a product by blackening a metal; forming a preset film layer on the base substrate which is provided with the light shielding layer; forming both a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process. The method of forming a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process saves one patterning process.

公开(公告)号：US12142696B2

公开(公告)日：2024-11-12

申请号：US17599688

申请日：2020-12-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Guan ,  Yichi Zhang ,  Yang Lv

IPC: H01L29/786 ,  H01L29/45 ,  H01L29/66

Abstract: A thin film transistor is provided. The thin film transistor includes abase substrate; a gate electrode on the base substrate; an active layer on the base substrate, the active layer including a polycrystalline silicon part including a polycrystalline silicon material and an amorphous silicon part including an amorphous silicon material; a gate insulating layer insulating the gate electrode from the active layer; a source electrode and a drain electrode on the base substrate; and an etch stop layer on a side of the polycrystalline silicon part away from the base substrate. An orthographic projection of the etch stop layer on the base substrate covers an orthographic projection of the polycrystalline silicon part on the base substrate, and an orthographic projection of at least a portion of the amorphous silicon part on the base substrate.

公开(公告)号：US11860541B2

公开(公告)日：2024-01-02

申请号：US17048301

申请日：2020-03-25

Applicant: BOE Technology Group Co., Ltd.

Inventor： Xue Dong ,  Guangcai Yuan ,  Feng Guan

IPC: H01L27/32 ,  H01L51/50 ,  H01L51/56 ,  G03F7/075 ,  G03F7/00 ,  G03F7/004 ,  G03F7/11 ,  H01L29/06 ,  H01L29/786 ,  B82Y30/00 ,  B82Y40/00 ,  C01B33/021

CPC classification number: G03F7/075 ,  G03F7/0002 ,  G03F7/0047 ,  G03F7/11 ,  H01L29/0669 ,  H01L29/78651 ,  H01L29/78696 ,  B82Y30/00 ,  B82Y40/00 ,  C01B33/021 ,  C01P2004/16

Abstract: The present disclosure discloses a silicon-based nanowire, a preparation method thereof, and a thin film transistor. By using a eutectic point of catalyst particles and silicon, and a driving factor that the Gibbs free energy of amorphous silicon is greater than that of crystalline silicon, and due to absorption of the amorphous silicon by the molten catalyst particles to form a supersaturated silicon eutectoid, the silicon nucleates and grows into silicon-based nanowires. Moreover, during the growth of the silicon-based nanowire, the amorphous silicon film grows linearly along guide slots under the action of the catalyst particles, and reverse growth of the silicon-based nanowire is restricted by the retaining walls, thus obtaining silicon-based nanowires with a high density and high uniformity. Furthermore, by controlling the size of the catalyst particles and the thickness of the amorphous silicon film, the width of the silicon-based nanowire may also be controlled.

公开(公告)号：US20220399465A1

公开(公告)日：2022-12-15

申请号：US17599688

申请日：2020-12-21

Applicant: BOE Technology Group Co., Ltd.

Inventor： Feng Guan ,  Yichi Zhang ,  Yang Lv

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/45

Abstract: A thin film transistor is provided. The thin film transistor includes abase substrate; a gate electrode on the base substrate; an active layer on the base substrate, the active layer including a polycrystalline silicon part including a polycrystalline silicon material and an amorphous silicon part including an amorphous silicon material; a gate insulating layer insulating the gate electrode from the active layer; a source electrode and a drain electrode on the base substrate; and an etch stop layer on a side of the polycrystalline silicon part away from the base substrate. An orthographic projection of the etch stop layer on the base substrate covers an orthographic projection of the polycrystalline silicon part on the base substrate, and an orthographic projection of at least a portion of the amorphous silicon part on the base substrate.

公开(公告)号：US11309427B2

公开(公告)日：2022-04-19

申请号：US16642638

申请日：2019-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhi Wang ,  Guangcai Yuan ,  Feng Guan ,  Chen Xu ,  Xueyong Wang ,  Jianhua Du ,  Chao Li ,  Lei Chen

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/66

Abstract: The present disclosure relates to a thin film transistor and a manufacturing method thereof. The thin film transistor includes a substrate, a first semiconductor layer, a gate dielectric layer, and a gate electrode sequentially stacked on the substrate, the first semiconductor layer has a first portion located in a channel region of the thin film transistor and a second portion in source/drain regions of the thin film transistor and located on both sides of the first portion, the second portion and first sub-portions of the first portion adjacent to the second portion include an amorphous semiconductor material, a second sub-portion of the first portion between the first sub-portions includes a polycrystalline semiconductor material, and a second semiconductor layer located in the source/drain regions and in contact with the second portion, wherein a conductivity of the second semiconductor layer is higher than a conductivity of the amorphous semiconductor material.

公开(公告)号：US11264384B2

公开(公告)日：2022-03-01

申请号：US16642723

申请日：2019-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhi Wang ,  Feng Guan ,  Guangcai Yuan ,  Chen Xu ,  Lei Chen

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/786

Abstract: The disclosure relates to a CMOS structure and a manufacturing method thereof. The CMOS structure includes a substrate and an N-type TFT and a P-type TFT on the substrate. The N-type TFT includes a first gate electrode, a first active layer, and a first gate dielectric layer therebetween. The first active layer includes a first semiconductor layer, a second semiconductor layer of the N-type, and a third semiconductor layer of the N-type which are located at opposite ends of the first semiconductor layer and sequentially stacked in a direction away from the first gate dielectric layer. An N-type doping concentration of the second semiconductor layer is smaller than that of the third semiconductor layer. The P-type TFT includes a fifth semiconductor layer and a sixth semiconductor layer. A P-type doping concentration of the fifth semiconductor layer is smaller than that of the sixth semiconductor layer.

公开(公告)号：US11183610B2

公开(公告)日：2021-11-23

申请号：US16909526

申请日：2020-06-23

Applicant: BOE Technology Group Co., Ltd.

Inventor： Chao Li ,  Jianhua Du ,  Feng Guan ,  Yupeng Gao ,  Zhaohui Qiang ,  Zhi Wang ,  Yang Lyu ,  Chao Luo

IPC: H01L31/105 ,  H01L27/12 ,  H01L31/12 ,  H01L31/18

Abstract: The present disclosure discloses a photoelectric detector, a preparation method thereof, a display panel and a display device. The photoelectric detector includes a base, and a thin film transistor (TFT) and a photosensitive PIN device on the base, wherein the PIN device includes an I-type region that does not overlap with an orthographic projection of the TFT on the base; a first etching barrier layer covering a top surface of the I-type region; a first heavily doped region in contact with a side surface on a side, proximate to the TFT, of the I-type region; and a second heavily doped region in contact with a side surface on a side, away from the TFT, of the I-type region, the doping types of the first heavily doped region and the second heavily doped region being different from each other.

公开(公告)号：US10923505B2

公开(公告)日：2021-02-16

申请号：US16535447

申请日：2019-08-08

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Guan ,  Lu Wang ,  Woobong Lee ,  Jianhua Du ,  Yang Lv ,  Zhaohui Qiang ,  Guangcai Yuan

IPC: H01L27/12

Abstract: The present disclosure provides a display substrate, a fabricating method thereof, and a display device. The method includes forming a light shielding layer on a surface of a base substrate, and forming a plurality of thin film transistors on a side of the light shielding layer away from the base substrate. Forming a plurality of thin film transistors on a side of the light shielding layer away from the base substrate includes forming a semiconductor layer at a position where an active layer is to be formed in each of the plurality of thin film transistors, generating heat using the light shielding layer, and utilizing the heat to crystallize the semiconductor layer.

公开(公告)号：US10281782B2

公开(公告)日：2019-05-07

申请号：US15229601

申请日：2016-08-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zhengliang Li ,  Shi Shu ,  Zhanfeng Cao ,  Bin Zhang ,  Xiaolong He ,  Qi Yao ,  Jincheng Gao ,  Feng Guan ,  Xuefei Sun

IPC: H01L21/02 ,  G02F1/1362 ,  H01L27/12

Abstract: A manufacturing method of an array substrate, an array substrate and a display device are provided. The method includes the following operations: forming a light shielding layer formed of a metal blacken production on a base substrate, wherein the metal blacken production is a product by blackening a metal; forming a preset film layer on the base substrate which is provided with the light shielding layer; forming both a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process. The method of forming a pattern of the light shielding layer and a pattern of the preset film layer through one patterning process saves one patterning process.

公开(公告)号：US10217353B2

公开(公告)日：2019-02-26

申请号：US15327412

申请日：2016-06-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Feng Guan ,  Zhanfeng Cao ,  Zhengliang Li ,  Qi Yao ,  Yaohui Gu

IPC: H04B10/116 ,  G08C23/04 ,  G06F3/14 ,  G05B15/02

Abstract: A data transmitting method, a data receiving method and the related device and system are provided. The data transmitting device includes a display screen, a first determination module, configured to determine one or more transmitting regions of the display screen, and a transmitting module, configured to transmit, by controlling a display of the one or more transmitting regions, target data in a format of a machine language via optical signals. The data receiving device includes a panel on which a plurality of optical sensors is arranged, a second determination module, configured to determine one or more receiving regions of the panel each corresponding to one or more of the optical sensor, and a receiving module, configured to receive, through each optical sensor in the one or more receiving regions, target data in a format of a machine language transmitted via optical signals.