Display Panel and Display Apparatus

    公开(公告)号:US20250037667A1

    公开(公告)日:2025-01-30

    申请号:US18696855

    申请日:2023-02-01

    Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.

    Display substrate and display device

    公开(公告)号:US12133428B2

    公开(公告)日:2024-10-29

    申请号:US17753513

    申请日:2021-03-25

    CPC classification number: H10K59/126 H10K59/131 H10K59/38 H10K59/87

    Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate and a light-shielding layer. The base substrate includes a display region including repeating units, each repeating unit includes a transparent region and a pixel region, the pixel region includes sub-pixels, each sub-pixel includes a sub-pixel driving circuit and a light-emitting element, and the light-emitting element includes a first electrode, a second electrode, and a light-emitting layer located between the first electrode and the second electrode. The light-shielding layer is located on a side of the sub-pixel driving circuit close to the base substrate, at least part of an orthographic projection of the light-shielding layer on a main surface of the base substrate overlaps with an orthographic projection of the sub-pixel driving circuit on the main surface of the base substrate, and the light-shielding layer is connected with the second electrode.

    ARRAY SUBSTRATE, DISPLAY APPARATUS, AND CONNECTION PAD

    公开(公告)号:US20240194688A1

    公开(公告)日:2024-06-13

    申请号:US17904748

    申请日:2021-10-18

    CPC classification number: H01L27/124 H01L27/1248

    Abstract: An array substrate having a connection pad in a connection pad area is provided. The connection pad includes a plurality of first probe contact pads, a plurality of second probe contact pads, a plurality of first connection lines coupled to the plurality of first probe contact pads, respectively, and a plurality of second connection lines coupled to the plurality of second probe contact pads, respectively; the plurality of first connection lines and the plurality of second connection lines being in two different layers. A total number of conductive layers electrically connected to a respective first connection line of the plurality of first connection lines is different from a total number of conductive layers electrically connected to a respective second connection line of the plurality of second connection lines.

    Transparent display panel and transparent display

    公开(公告)号:US11239216B2

    公开(公告)日:2022-02-01

    申请号:US16860259

    申请日:2020-04-28

    Abstract: A transparent display panel includes a base and a plurality of sub-pixels disposed on the base. Each sub-pixel includes a light-emitting unit, and a light transmission portion disposed on at least one side of the light-emitting unit. The light-emitting unit includes at least one Micro-LED and a control circuit connected to the Micro-LED. The control circuit is configured to drive the at least one Micro-LED to emit light. The light transmission portion includes at least one of a transparent insulating portion or an opening.

    Thin film transistor, gate driver circuit and display apparatus

    公开(公告)号:US11183142B2

    公开(公告)日:2021-11-23

    申请号:US16493429

    申请日:2019-05-06

    Abstract: The present disclosure relates to a thin film transistor. The thin film transistor may include a substrate, a source electrode on the substrate, a drain electrode on the substrate, a gate on the substrate, and an active layer on the substrate. The source electrode may include a first teeth portion. The drain electrode may include a second teeth portion. The gate may include a third teeth portion. The active layer may include a plurality of channel regions. The first teeth portion, the second teeth portion, the third teeth portion, and the active layer form a plurality of sub-thin film transistors connected in parallel. The center sub-thin film transistor has a channel region having a smallest width-to-length ratio among the plurality of sub-thin film transistors.

Patent Agency Ranking