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公开(公告)号:US12283248B1
公开(公告)日:2025-04-22
申请号:US18577444
申请日:2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
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公开(公告)号:US20250037667A1
公开(公告)日:2025-01-30
申请号:US18696855
申请日:2023-02-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing Zhang , Pan Xu , Ying Han , Chengyuan Luo , Donghui Zhao , Guangshuang Lv , Cheng Xu
IPC: G09G3/3266 , G09G3/32 , G09G3/3233 , G09G3/36
Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.
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公开(公告)号:US20250078762A1
公开(公告)日:2025-03-06
申请号:US18579920
申请日:2023-03-31
Applicant: BOE Technology Group Co., Ltd.
Inventor: Donghui Zhao , Pan Xu , Ying Han , Xing Zhang , Chengyuan Luo , Guangshuang Lv , Cheng Xu , Hongli Wang , Tong Wu , Dandan Zhou
IPC: G09G3/3258 , G11C19/28
Abstract: A grid-driving-circuit array is applied to a display panel, the display panel is delimited into a plurality of active areas, and each of the active areas includes multiple rows of pixel units and multiple rows of grid lines. The multiple groups of grid driving units supply grid driving signals to the plurality of active areas, and each of the groups of grid driving units includes one or more grid driving circuits. The one or more grid driving circuits are configured for supplying the grid driving signals to the grid lines within the active area corresponding to the one or more grid driving circuits. One or more multiplexers, wherein each of the multiplexers includes a plurality of frame-starting-up-signal outputting units, each of the frame-starting-up-signal outputting units of the multiplexer is configured for supplying a frame starting-up signal to one of the grid driving circuits.
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公开(公告)号:US12046210B2
公开(公告)日:2024-07-23
申请号:US17621188
申请日:2020-10-29
Inventor: Xinlan Yang , Shijun Wang , Wenkai Mu , Yi Liu , Bo Feng , Yang Wang , Zhan Wei , Tengfei Ding , Jun Fan , Yuke Tai , Gongda Chen , Guangshuang Lv , Yingzi Wang
IPC: G09G3/36 , G02F1/1335 , G06V40/13
CPC classification number: G09G3/3607 , G02F1/133514 , G06V40/1318 , G09G2300/0452
Abstract: Provided is an array substrate including: a first base, wherein the first base is provided with a plurality of pixel regions, and the pixel region includes a white sub-pixel region and at least two color sub-pixel regions; and a plurality of photosensitive devices disposed on the first base, wherein an orthographic projection of the photosensitive device onto the first base at least partially overlaps with the white sub-pixel region. A liquid crystal display panel and a display apparatus are also provided.
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公开(公告)号:US20250124876A1
公开(公告)日:2025-04-17
申请号:US18577444
申请日:2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
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公开(公告)号:US12262597B2
公开(公告)日:2025-03-25
申请号:US18282106
申请日:2022-11-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Ying Han , Pan Xu , Xing Zhang , Guangshuang Lv , Donghui Zhao , Chengyuan Luo , Cheng Xu
IPC: H10K59/124 , G09G3/00 , G09G3/3225 , H10K59/122 , H10K59/131
Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.
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