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公开(公告)号：US20240155893A1
公开(公告)日：2024-05-09
申请号：US18261880
申请日：2022-09-06
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao , Mingi Chu
IPC: H10K59/131 , G09G3/3233
CPC classification number: H10K59/131 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2300/0819 , G09G2300/0852 , G09G2310/08 , G09G2320/0233
Abstract: A display substrate includes: a base substrate, a plurality of pixel units and a plurality of initialization voltage signal lines. The pixel units are arranged in an array to form a plurality of rows of pixel units and a plurality of columns of pixel units, at least one pixel unit includes sub-pixels, and at least one sub-pixel includes a light-emitting element and a pixel driving circuit. The initialization voltage signal lines are configured to provide initialization voltage signals to the plurality of rows of pixel units respectively, and are arranged at intervals along a second direction. At least one initialization voltage signal line extends along a first direction. The plurality of rows of pixel units include a (2n−1)th row and a 2nth row and pixel driving circuits of the (2n−1)th row and pixel driving circuits of the 2nth rows share a common initialization voltage signal line.
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公开(公告)号：US20240038142A1
公开(公告)日：2024-02-01
申请号：US18042342
申请日：2022-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao
CPC classification number: G09G3/32 , H01L27/124 , G09G2300/0842 , G09G2310/0262 , G09G2300/0408 , G09G2320/02 , G09G2310/08 , H01L27/1222
Abstract: A display panel includes: a plurality of pixel circuits arranged on base substrate, at least one pixel circuit includes a drive transistor and a first switch transistor; an active layer arranged on base substrate and including a first active portion and a second active portion, the first active portion is configured to form a channel portion of the drive transistor, the second active portion is configured to form a second electrode connection portion of the first switch transistor; and a first conductive layer arranged on a side of the active layer away from the base substrate, the first conductive layer includes a first conductive portion, a portion of the first conductive portion is used to form a gate electrode of the drive transistor, another portion is electrically connected to the second active portion and a channel length of the channel portion of the drive transistor is greater than a channel width.
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公开(公告)号：US12283248B1
公开(公告)日：2025-04-22
申请号：US18577444
申请日：2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
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公开(公告)号：US20250124876A1
公开(公告)日：2025-04-17
申请号：US18577444
申请日：2023-03-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Chengyuan Luo , Pan Xu , Ying Han , Donghui Zhao , Guangshuang Lv , Xing Zhang , Miao Liu , Xing Yao , Cheng Xu
IPC: G09G3/3266 , H10K59/131
Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.
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公开(公告)号：US12262597B2
公开(公告)日：2025-03-25
申请号：US18282106
申请日：2022-11-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying Han , Pan Xu , Xing Zhang , Guangshuang Lv , Donghui Zhao , Chengyuan Luo , Cheng Xu
IPC: H10K59/124 , G09G3/00 , G09G3/3225 , H10K59/122 , H10K59/131
Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.
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Patent Agency Ranking
公开(公告)号：US11955063B2
公开(公告)日：2024-04-09
申请号：US18042342
申请日：2022-05-31
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao
CPC classification number: G09G3/32 , H01L27/124 , G09G2300/0408 , G09G2300/0842 , G09G2310/0262 , G09G2310/08 , G09G2320/02 , H01L27/1222
Abstract: A display panel includes: plurality of pixel circuits arranged on base substrate, at least one pixel circuit includes a drive transistor and a first switch transistor an active layer arranged on base substrate and including a first active portion and a second active portion, the first active portion configured to form a channel portion of the drive transistor, the second active portion is configured to form a second electrode connection portion of the first switch transistor; and a first conductive layer arranged on a side of the active layer away from the base substrate, the first conductive layer includes a first conductive portion, a portion of the first conductive portion used to form a gate electrode of the drive transistor another portion is electrically connected to the second active portion, and a channel length of the channel portion of the drive transistor is greater than a channel width.
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公开(公告)号：US20250037667A1
公开(公告)日：2025-01-30
申请号：US18696855
申请日：2023-02-01
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xing Zhang , Pan Xu , Ying Han , Chengyuan Luo , Donghui Zhao , Guangshuang Lv , Cheng Xu
IPC: G09G3/3266 , G09G3/32 , G09G3/3233 , G09G3/36
Abstract: A display panel includes a plurality of rows of pixel circuits, one or more rows of first dummy pixel circuits, a plurality of cascaded scanning driving units and at least one first dummy scanning driving unit. The plurality of rows of pixel circuits are arranged in a first direction. The one or more rows of first dummy pixel circuits are located on a side of the plurality of rows of pixel circuits in the first direction. Each scanning driving unit is configured to transmit a scanning signal to at least one row of pixel circuits. A first dummy scanning driving unit is cascaded to a first stage of scanning driving unit among the plurality of scanning driving units, and is configured to transmit; a cascade signal to the first stage of scanning driving unit; and transmit scanning signals to at least one row of first dummy pixel circuits.
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公开(公告)号：US20250078762A1
公开(公告)日：2025-03-06
申请号：US18579920
申请日：2023-03-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Donghui Zhao , Pan Xu , Ying Han , Xing Zhang , Chengyuan Luo , Guangshuang Lv , Cheng Xu , Hongli Wang , Tong Wu , Dandan Zhou
IPC: G09G3/3258 , G11C19/28
Abstract: A grid-driving-circuit array is applied to a display panel, the display panel is delimited into a plurality of active areas, and each of the active areas includes multiple rows of pixel units and multiple rows of grid lines. The multiple groups of grid driving units supply grid driving signals to the plurality of active areas, and each of the groups of grid driving units includes one or more grid driving circuits. The one or more grid driving circuits are configured for supplying the grid driving signals to the grid lines within the active area corresponding to the one or more grid driving circuits. One or more multiplexers, wherein each of the multiplexers includes a plurality of frame-starting-up-signal outputting units, each of the frame-starting-up-signal outputting units of the multiplexer is configured for supplying a frame starting-up signal to one of the grid driving circuits.
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公开(公告)号：US12127454B2
公开(公告)日：2024-10-22
申请号：US18261880
申请日：2022-09-06
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao , Mingi Chu
IPC: H10K59/131 , G09G3/3233
CPC classification number: H10K59/131 , G09G3/3233 , G09G2300/0408 , G09G2300/0426 , G09G2300/0452 , G09G2300/0819 , G09G2300/0852 , G09G2310/08 , G09G2320/0233
Abstract: A display substrate includes: a base substrate, a plurality of pixel units and a plurality of initialization voltage signal lines. The pixel units are arranged in an array to form a plurality of rows of pixel units and a plurality of columns of pixel units, at least one pixel unit includes sub-pixels, and at least one sub-pixel includes a light-emitting element and a pixel driving circuit. The initialization voltage signal lines are configured to provide initialization voltage signals to the plurality of rows of pixel units respectively, and are arranged at intervals along a second direction. At least one initialization voltage signal line extends along a first direction. The plurality of rows of pixel units include a (2n−1)th row and a 2nth row and pixel driving circuits of the (2n−1)th row and pixel driving circuits of the 2nth rows share a common initialization voltage signal line.
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公开(公告)号：US20240324353A1
公开(公告)日：2024-09-26
申请号：US18578202
申请日：2023-05-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ying Han , Pan Xu , Xing Zhang , Chengyuan Luo , Donghui Zhao , Dacheng Zhang
IPC: H10K59/131 , H10K59/80
CPC classification number: H10K59/131 , H10K59/80516
Abstract: A display panel includes a substrate, an auxiliary electrode, a connection portion, a light-emitting layer and a cathode layer. The connection portion includes a first connection pattern connected to the auxiliary electrode, a second connection pattern, and a third connection pattern that are sequentially stacked. An edge of the second connection pattern is indented inward relative to an edge of the third connection pattern. The light-emitting layer includes a first light-emitting pattern and a second light-emitting pattern. The first light-emitting pattern is located around and separated from the second light-emitting pattern. The second light-emitting pattern is located on a side of the third connection pattern away from the substrate. The cathode layer passes through a gap between the first light-emitting pattern and the second light-emitting pattern to be in electrical contact with the at least one of the first connection pattern, the second connection pattern and the third connection pattern.
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