公开(公告)号：US07491973B2

公开(公告)日：2009-02-17

申请号：US11165194

申请日：2005-06-24

申请人： Kazuya Matsuzawa

发明人： Kazuya Matsuzawa

IPC分类号： H01L29/10 ,  H01L29/73 ,  H01L29/76

CPC分类号： H01L29/785 ,  H01L21/28273 ,  H01L21/845 ,  H01L27/0694 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/115 ,  H01L27/1211 ,  H01L29/66787 ,  H01L29/66825 ,  H01L29/78645 ,  H01L29/78648 ,  H01L29/788

摘要： Basic logic gates are formed in a small area, and a highly integrated and microscopic structure is provided. In an nMOSFET and a pMOSFET, gate electrodes are formed facing each other and sandwiching a semiconductor region via gate insulting layers. Respective drain regions of the nMOSFET and the pMOSFET are connected to each other. A high potential is applied to a source region of the pMOSFET while an intermediate potential between the high and a low potential is applied to a source region of the nMOSFET. As a result, a NAND gate is provided. The intermediate potential between the high and the low potential is applied to the source region of the pMOSFET. The low potential is applied to the source region of the nMOSFET. As a result, a NOR gate is provided.

摘要翻译： 基本逻辑门形成在小面积上，并提供高度集成和微观结构。 在nMOSFET和pMOSFET中，栅电极形成为彼此面对，并通过栅极绝缘层夹住半导体区域。 nMOSFET和pMOSFET的漏极区彼此连接。 将高电位施加到pMOSFET的源极区域，同时将高电位和低电位之间的中间电位施加到nMOSFET的源极区域。 结果，提供了与非门。 将高电位和低电位之间的中间电位施加到pMOSFET的源极区。 低电位被施加到nMOSFET的源极区域。 结果，提供了NOR门。

公开(公告)号：US07383245B2

公开(公告)日：2008-06-03

申请号：US10205471

申请日：2002-07-26

申请人： Kazuya Matsuzawa

发明人： Kazuya Matsuzawa

IPC分类号： G06F17/30

CPC分类号： H03M7/30 ,  Y10S707/99932 ,  Y10S707/99933 ,  Y10S707/99942

摘要： A data compression apparatus includes a characterizing point extracting part which extracts data expressing characterizing points included in a plurality of data showing a result of carrying out simulation a quantized data generating part which generates quantized data obtained by quantizing data except for data expressing characterizing points, and a file number converting part which converts the same types of quantized data including in the quantized data, into a relating file number. During data compression, data except for the characterizing points is compressed. If the same quantized data is included at the same address location in the previously-compressed file, the quantized data is replaced with the file number of the previous compression file, thereby compressing data at high efficiency.

摘要翻译： 数据压缩装置包括表征点提取部分，其提取表示表示表示进行模拟结果的多个数据中的特征点的数据的量化数据生成部分的数据，该量化数据产生部分生成通过量化除表示特征点的数据之外的数据获得的量化数据，以及 将包含量化数据的相同类型的量化数据转换为相关文件号的文件编号转换部分。 在数据压缩期间，除了特征点之外的数据被压缩。 如果相同的量化数据包含在先前压缩文件中的相同地址位置，则将量化的数据替换为先前压缩文件的文件号，从而以高效率压缩数据。

公开(公告)号：US20070132006A1

公开(公告)日：2007-06-14

申请号：US11464068

申请日：2006-08-11

申请人： Kazuya Matsuzawa

发明人： Kazuya Matsuzawa

IPC分类号： H01L29/788

CPC分类号： H01L29/42336 ,  G11C16/0483 ,  H01L27/115 ,  H01L27/11521

摘要： According to an aspect of the invention, a nonvolatile semiconductor memory comprises: a semiconductor substrate; a trench formed in the semiconductor substrate; a first insulating film being formed on a wall surface of the trench; a floating gate electrode formed on the first insulating film inside the trench; a source region formed in the semiconductor substrate; a drain region formed in the semiconductor substrate; a channel region formed between the source region and the drain region in the semiconductor substrate, a second insulating film formed on a surface of the semiconductor substrate; and a control gate electrode formed on the channel region and a surface of the second insulating film. The channel region is adjacent to the trench. A storage state of the nonvolatile semiconductor memory is formed by injecting or drawing charge into or from the floating gate electrode when a tunnel current flows through the first insulating film.

摘要翻译： 根据本发明的一个方面，非易失性半导体存储器包括：半导体衬底; 形成在半导体衬底中的沟槽; 形成在所述沟槽的壁表面上的第一绝缘膜; 形成在所述沟槽内的所述第一绝缘膜上的浮栅; 形成在所述半导体衬底中的源区; 漏极区，形成在所述半导体衬底中; 形成在所述半导体衬底中的源极区域和漏极区域之间的沟道区域，形成在所述半导体衬底的表面上的第二绝缘膜; 以及形成在沟道区域和第二绝缘膜的表面上的控制栅电极。 沟道区域与沟槽相邻。 当隧道电流流过第一绝缘膜时，通过向浮栅电极注入或吸入电荷形成非易失性半导体存储器的存储状态。

公开(公告)号：US07199428B2

公开(公告)日：2007-04-03

申请号：US11098671

申请日：2005-04-05

申请人： Kazuya Matsuzawa

发明人： Kazuya Matsuzawa

IPC分类号： H01L29/94

CPC分类号： H01L27/1203 ,  H01L21/84 ,  H01L27/11 ,  H01L27/1104 ,  H01L27/118 ,  H01L29/785 ,  Y10S257/903

摘要： A semiconductor memory includes first to sixth ridges, an insulating layers on the first to sixth ridges, a first gate line above the first to fourth ridges, and a second gate line above the third to sixth ridges, wherein the first and sixth ridges, the insulating layers, and the first and second gate lines implement first and second capacitors, the second and third ridges and the first gate line implement first driver and load transistors, and the fourth and fifth ridges and the second gate lines implement second load and driver transistors.

摘要翻译： 半导体存储器包括第一至第六脊，第一至第六脊上的绝缘层，第一至第四脊上方的第一栅极线，以及第三至第六脊上方的第二栅极线，其中第一和第六脊， 绝缘层，并且第一和第二栅极线实现第一和第二电容器，第二和第三脊和第一栅极线实现第一驱动器和负载晶体管，并且第四和第五脊和第二栅极线实现第二负载和驱动晶体管 。

公开(公告)号：US20060244435A1

公开(公告)日：2006-11-02

申请号：US11476722

申请日：2006-06-29

申请人： Hiroshi Watanabe ,  Kazuya Matsuzawa ,  Riichiro Shirota

发明人： Hiroshi Watanabe ,  Kazuya Matsuzawa ,  Riichiro Shirota

IPC分类号： G01R19/00

CPC分类号： H01L29/7883 ,  G01R31/2642 ,  G06F9/3802 ,  G06F2221/2137 ,  G06K19/0723 ,  G06K19/073 ,  G06K19/07372 ,  G06Q20/341 ,  G07C9/00111 ,  G07C2009/00976 ,  G07F7/082 ,  G07F7/084 ,  G07F7/1008 ,  G11C16/14 ,  G11C16/349 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11558 ,  H01L29/42324 ,  H01L29/66825

摘要： A time limit function utilization apparatus includes a first function block, a second function block, a signal line which connects the first and second function blocks and allows using a desired function that is generated by accessing the first and second function blocks with each other, and a semiconductor time switch interposed in or connected to the signal line, and disables or enables mutual access between the first and second function blocks upon the lapse of a predetermined time.

摘要翻译： 时间限制功能利用装置包括第一功能块，第二功能块，连接第一功能块和第二功能块的信号线，并且允许使用通过彼此访问第一和第二功能块而产生的期望功能，以及 插入或连接到信号线的半导体时间开关，并且在经过预定时间后禁用或使第一和第二功能块之间能够相互接近。