公开(公告)号：US20120052673A1

公开(公告)日：2012-03-01

申请号：US13204349

申请日：2011-08-05

Applicant: Dong-Chul Yoo ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Jin-Gyun Kim

Inventor： Dong-Chul Yoo ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Jin-Gyun Kim

IPC: H01L21/336

CPC classification number: H01L27/11578 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

Abstract: A method for fabricating a nonvolatile memory device is disclosed. The method includes forming a first structure for a common source line on a semiconductor substrate, the first structure extending along a first direction, forming a mold structure by alternately stacking a plurality of sacrificial layers and a plurality of insulating layers on the semiconductor substrate, forming a plurality of openings in the mold structure exposing a portion of the first structure, and forming a first memory cell string at a first side of the first structure and a second memory cell string at a second, opposite side of the first structure. The plurality of openings include a first through-hole and a second through-hole, each through-hole passing through the plurality of sacrificial layers and plurality of insulating layers, and the first through-hole and the second through-hole overlap each other in the first direction.

Abstract translation: 公开了一种用于制造非易失性存储器件的方法。 该方法包括在半导体衬底上形成用于公共源极线的第一结构，第一结构沿着第一方向延伸，通过在半导体衬底上交替堆叠多个牺牲层和多个绝缘层来形成模具结构，形成 所述模具结构中的多个开口露出所述第一结构的一部分，以及在所述第一结构的第一侧形成第一存储单元串，以及在所述第一结构的第二相反侧形成第二存储单元串。 多个开口包括第一通孔和第二通孔，每个通孔穿过多个牺牲层和多个绝缘层，并且第一通孔和第二通孔重叠在一起 第一个方向。

公开(公告)号：US08114735B2

公开(公告)日：2012-02-14

申请号：US11902209

申请日：2007-09-20

Applicant: Hong-Suk Kim ,  Si-Young Choi ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Seung-Jae Baik ,  Sun-Jung Kim ,  Kwang-Min Park ,  In-Sun Yi

Inventor： Hong-Suk Kim ,  Si-Young Choi ,  Ki-Hyun Hwang ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Seung-Jae Baik ,  Sun-Jung Kim ,  Kwang-Min Park ,  In-Sun Yi

IPC: H01L21/336

CPC classification number: H01L29/792 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28282 ,  H01L21/3185 ,  H01L29/4234 ,  H01L29/518 ,  H01L29/7923

Abstract: In a method of manufacturing a non-volatile memory device, a tunnel insulating layer may be formed on a channel region of a substrate. A charge trapping layer including silicon nitride may be formed on the tunnel insulating layer to trap electrons from the channel region. A heat treatment may be performed using a first gas including nitrogen and a second gas including oxygen to remove defect sites in the charge trapping layer and to densify the charge trapping layer. A blocking layer may be formed on the heat-treated charge trapping layer, and a conductive layer may then formed on the blocking layer. The blocking layer, the conductive layer, the heat-treated charge trapping layer and the tunnel insulating layer may be patterned to form a gate structure on the channel region. Accordingly, data retention performance and/or reliability of a non-volatile memory device including the gate structure may be improved.

Abstract translation: 在制造非易失性存储器件的方法中，隧道绝缘层可以形成在衬底的沟道区上。 可以在隧道绝缘层上形成包括氮化硅的电荷俘获层，以从沟道区捕获电子。 可以使用包括氮气的第一气体和包括氧的第二气体来进行热处理，以去除电荷捕获层中的缺陷位点并致密化电荷捕获层。 可以在热处理的电荷俘获层上形成阻挡层，然后可以在阻挡层上形成导电层。 阻挡层，导电层，热处理电荷捕获层和隧道绝缘层可以被图案化以在沟道区上形成栅极结构。 因此，可以提高包括门结构的非易失性存储器件的数据保持性能和/或可靠性。

公开(公告)号：US20110281379A1

公开(公告)日：2011-11-17

申请号：US13102218

申请日：2011-05-06

Applicant: Jun-Kyu YANG ,  Young-Geun PARK ,  Ki-Hyun HWANG ,  Han-Mei CHOI ,  Dong-Chul YOO

Inventor： Jun-Kyu YANG ,  Young-Geun PARK ,  Ki-Hyun HWANG ,  Han-Mei CHOI ,  Dong-Chul YOO

IPC: H01L21/66 ,  B08B5/00 ,  H01L21/02 ,  H01L21/3205 ,  H01L21/28

CPC classification number: H01L21/02071 ,  H01L21/02074 ,  H01L21/28282 ,  H01L21/321 ,  H01L21/76834 ,  H01L22/12 ,  H01L22/20 ,  H01L27/1052 ,  H01L27/10817 ,  H01L27/10873 ,  H01L27/11573 ,  H01L27/11578 ,  H01L27/11582 ,  H01L27/2436 ,  H01L28/40 ,  H01L29/66833 ,  H01L29/7926 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/146 ,  H01L45/1675

Abstract: Methods of forming conductive patterns include forming a conductive layer including a metal element on a substrate. The conductive layer is partially etched to generate a residue including an oxide of the metal element and to form a plurality of separately formed conductive layer patterns. A cleaning gas is inflowed onto the substrate including the conductive layer pattern. The metal compound is evaporated to remove the metal element contained in the residue and to form an insulating interface layer on the conductive layer pattern and a surface portion of the substrate through a reaction of a portion of the cleaning gas and oxygen. The residue may be removed from the conductive layer pattern to suppress generation of a leakage current.

Abstract translation: 形成导电图案的方法包括在基板上形成包括金属元素的导电层。 导电层被部分地蚀刻以产生包括金属元素的氧化物的残渣并且形成多个单独形成的导电层图案。 清洁气体流入包括导电层图案的基板上。 蒸发金属化合物以除去残留物中所含的金属元素，并通过一部分清洁气体和氧气的反应在导电层图案和基板的表面部分上形成绝缘界面层。 可以从导电层图案中除去残留物以抑制漏电流的产生。

公开(公告)号：US08039054B2

公开(公告)日：2011-10-18

申请号：US10854942

申请日：2004-05-27

Applicant: In-Sung Park ,  Young-Wook Park ,  Myeong-Jin Kim ,  Eun-Taek Yim ,  Han-Mei Choi ,  Kyoung-Seok Kim ,  Beung-Keun Lee

Inventor： In-Sung Park ,  Young-Wook Park ,  Myeong-Jin Kim ,  Eun-Taek Yim ,  Han-Mei Choi ,  Kyoung-Seok Kim ,  Beung-Keun Lee

IPC: C23C16/00

CPC classification number: C23C16/45531 ,  C23C16/403 ,  C23C16/45527 ,  C23C16/45561

Abstract: A layer deposition method includes: feeding a reactant with a first flow of an inert gas as a carrier gas into a reaction chamber to chemisorb the reactant on a substrate; feeding the first flow of the inert gas to purge the reaction chamber and a first reactant feed line; and feeding the second flow of the inert gas into the reaction chamber through a feed line different from the first reactant feed line.

Abstract translation: 层沉积方法包括：将具有作为载气的惰性气体的第一流的反应物进料到反应室中以化学吸附基材上的反应物; 供给惰性气体的第一流以吹扫反应室和第一反应物进料管线; 以及通过不同于第一反应物进料管线的进料管线将惰性气体的第二流量进料到反应室中。

公开(公告)号：US20110159680A1

公开(公告)日：2011-06-30

申请号：US12975071

申请日：2010-12-21

Applicant: Dong-Chul YOO ,  Byong-Ju KIM ,  Han-Mei CHOI ,  Ki-Hyun HWANG

Inventor： Dong-Chul YOO ,  Byong-Ju KIM ,  Han-Mei CHOI ,  Ki-Hyun HWANG

IPC: H01L21/28 ,  B05D5/12

CPC classification number: H01L21/28194 ,  C23C16/403 ,  C23C16/45525 ,  C23C16/56 ,  H01L21/02178 ,  H01L21/0228 ,  H01L27/10852 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11578 ,  H01L27/11582 ,  H01L28/40 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/78

Abstract: In a method of forming an aluminum oxide layer, an aluminum source gas and a dilution gas can be supplied into a chamber through a common gas supply nozzle so that the aluminum source gas may be adsorbed on a substrate in the chamber. A first purge gas can be supplied into the chamber to purge the physically adsorbed aluminum source gas from the substrate. An oxygen source gas may be supplied into the chamber to form an aluminum oxide layer on the substrate. A second purge gas may be supplied into the chamber to purge a reaction residue and the physically adsorbed remaining gas from the substrate. The operations can be performed repeatedly to form an aluminum oxide layer having a desired thickness.

Abstract translation: 在形成氧化铝层的方法中，可以通过公共气体供给喷嘴将铝源气体和稀释气体供给到室中，从而可以将铝源气体吸附在室内的基板上。 可以将第一吹扫气体供应到室中以从衬底清除物理吸附的铝源气体。 可以将氧源气体供应到室中以在衬底上形成氧化铝层。 可以将第二吹扫气体供应到室中以净化反应残余物和物理吸附的残留气体。 可以重复进行操作以形成具有所需厚度的氧化铝层。

公开(公告)号：US20110101438A1

公开(公告)日：2011-05-05

申请号：US12938006

申请日：2010-11-02

Applicant: Dong-Chul Yoo ,  Byong-Ju Kim ,  Han-Mei Choi ,  Ki-Hyun Hwang

Inventor： Dong-Chul Yoo ,  Byong-Ju Kim ,  Han-Mei Choi ,  Ki-Hyun Hwang

IPC: H01L29/788 ,  H01L29/792

CPC classification number: H01L29/42324 ,  G11C16/0416 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/11521 ,  H01L27/11568 ,  H01L29/4234 ,  H01L29/513

Abstract: Nonvolatile memory devices include a tunnel insulating layer on a substrate and a charge storing layer on the tunnel insulating layer. A charge transfer blocking layer is provided on the charge storing layer. The charge transfer blocking layer is formed as a composite of multiple layers, which include a first oxide layer having a thickness of about 1 Å to about 10 Å. This first oxide layer is formed directly on the charge storing layer. The charge transfer blocking layer includes a first dielectric layer on the first oxide layer. The charge transfer blocking layer also includes a second oxide layer on the first dielectric layer and a second dielectric layer on the second oxide layer. The first and second dielectric layers have a higher dielectric constant relative to the first and second oxide layers, respectively. The memory cell includes an electrically conductive electrode on the charge transfer blocking layer.

Abstract translation: 非易失性存储器件包括衬底上的隧道绝缘层和隧道绝缘层上的电荷存储层。 电荷转移阻挡层设置在电荷存储层上。 电荷转移阻挡层形成为多层的复合物，其包括厚度为约至约的第一氧化物层。 该第一氧化物层直接形成在电荷存储层上。 电荷转移阻挡层包括在第一氧化物层上的第一电介质层。 电荷转移阻挡层还包括在第一介电层上的第二氧化物层和第二氧化物层上的第二介电层。 第一和第二电介质层分别相对于第一和第二氧化物层具有更高的介电常数。 存储单元包括电荷转移阻挡层上的导电电极。

公开(公告)号：US07682906B2

公开(公告)日：2010-03-23

申请号：US11907162

申请日：2007-10-10

Applicant: Young-Geun Park ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Sun-Jung Kim ,  Se-Hoon Oh ,  Young-Sun Kim

Inventor： Young-Geun Park ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Sun-Jung Kim ,  Se-Hoon Oh ,  Young-Sun Kim

IPC: H01L21/8247

CPC classification number: H01L21/28273 ,  H01L21/02181 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/3145 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7881

Abstract: A method of manufacturing a non-volatile memory device includes forming a tunnel isolation layer forming a tunnel isolation layer on a substrate, forming a conductive pattern on the tunnel isolation layer, forming a lower silicon oxide layer on the conductive pattern, treating a surface portion of the lower silicon oxide layer with a nitridation treatment to form a first silicon oxynitride layer on the lower silicon oxide layer, forming a metal oxide layer on the first silicon oxynitride layer, forming an upper silicon oxide layer on the metal oxide layer, and forming a conductive layer on the upper silicon oxide layer.

Abstract translation: 一种制造非易失性存储器件的方法包括在衬底上形成形成隧道隔离层的隧道隔离层，在隧道隔离层上形成导电图案，在导电图案上形成下部氧化硅层，处理表面部分 通过氮化处理以在下部氧化硅层上形成第一氧氮化硅层，在第一氮氧化硅层上形成金属氧化物层，在金属氧化物层上形成上部氧化硅层，形成 在上氧化硅层上的导电层。

公开(公告)号：US07635633B2

公开(公告)日：2009-12-22

申请号：US11898039

申请日：2007-09-07

Applicant: Se-Hoon Oh ,  Young-Geun Park ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Sun-Jung Kim

Inventor： Se-Hoon Oh ,  Young-Geun Park ,  Han-Mei Choi ,  Seung-Hwan Lee ,  Ki-Yeon Park ,  Sun-Jung Kim

IPC: H01L21/336

CPC classification number: H01L21/28282 ,  H01L29/4234 ,  H01L29/513 ,  H01L29/792

Abstract: In a non-volatile memory device and a method of manufacturing the non-volatile memory device, a tunnel insulating layer, a charge trapping layer, a dielectric layer and a conductive layer may be sequentially formed on a channel region of a substrate. The conductive layer may be patterned to form a gate electrode and spacers may be formed on sidewalls of the gate electrode. A dielectric layer pattern, a charge trapping layer pattern, and a tunnel insulating layer pattern may be formed on the channel region by an anisotropic etching process using the spacers as an etch mask. Sidewalls of the charge trapping layer pattern may be removed by an isotropic etching process to reduce the width thereof. Thus, the likelihood of lateral diffusion of electrons may be reduced or prevented in the charge trapping layer pattern and high temperature stress characteristics of the non-volatile memory device may be improved.

Abstract translation: 在非易失性存储器件和制造非易失性存储器件的方法中，隧道绝缘层，电荷俘获层，电介质层和导电层可以顺序形成在衬底的沟道区上。 可以将导电层图案化以形成栅电极，并且可以在栅电极的侧壁上形成间隔物。 可以通过使用间隔物作为蚀刻掩模的各向异性蚀刻工艺在沟道区上形成电介质层图案，电荷俘获层图案和隧道绝缘层图案。 可以通过各向同性蚀刻工艺去除电荷俘获层图案的侧壁以减小其宽度。 因此，电荷捕获层图案中电子的横向扩散的可能性可能会降低或被抑制，并且可以提高非易失性存储器件的高温应力特性。

公开(公告)号：US07605067B2

公开(公告)日：2009-10-20

申请号：US11859618

申请日：2007-09-21

Applicant: Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

Inventor： Ki-Yeon Park ,  Sun-Jung Kim ,  Min-Kyung Ryu ,  Seung-Hwan Lee ,  Han-Mei Choi

IPC: H01L21/3205

CPC classification number: H01L27/115 ,  H01L27/11521

Abstract: A method of manufacturing a non-volatile memory device includes forming a tunnel insulating layer on a substrate, forming a conductive pattern on the tunnel insulating layer, forming a lower dielectric layer on the conductive pattern, performing a first heat treatment process to density the lower dielectric layer, and forming a middle dielectric layer having an energy band gap smaller than that of the lower dielectric layer on the first heat-treated lower dielectric layer. The method further includes forming an upper dielectric layer including a material substantially identical to that of the lower dielectric layer on the middle dielectric layer, performing a second heat treatment process to densify the middle dielectric layer and the upper dielectric layer and forming a conductive layer on the second heat-treated upper dielectric layer.

Abstract translation: 一种制造非易失性存储器件的方法包括在衬底上形成隧道绝缘层，在隧道绝缘层上形成导电图案，在导电图案上形成下介电层，执行第一热处理工艺以密度较低 并且形成具有比第一经热处理的下电介质层上的下介电层的能带隙小的能带隙的中间电介质层。 该方法还包括形成上介电层，其包括与中间介电层上的下电介质层的材料基本相同的材料，执行第二热处理工艺以使中介电层和上电介质层致密并形成导电层 第二热处理的上介电层。

公开(公告)号：US20080096349A1

公开(公告)日：2008-04-24

申请号：US11605452

申请日：2006-11-29

Applicant: Ki-yeon Park ,  Han-mei Choi ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim

Inventor： Ki-yeon Park ,  Han-mei Choi ,  Seung-hwan Lee ,  Sung-tae Kim ,  Young-sun Kim

IPC: H01L21/336

CPC classification number: H01L29/792 ,  H01L21/02178 ,  H01L21/0228 ,  H01L21/3143 ,  H01L21/31604 ,  H01L21/3162 ,  H01L29/513 ,  H01L29/66833

Abstract: A method of fabricating a nonvolatile memory device includes forming a charge tunneling layer on a semiconductor substrate, forming a charge trapping layer on the charge tunneling layer, forming a first charge blocking layer on the charge trapping layer by supplying a metal source gas and a first oxidizing gas onto the charge trapping layer, forming a second charge blocking layer on the first charge blocking layer by supplying a metal source gas and a second oxidizing gas onto the first charge blocking layer, wherein the second oxidizing gas has a higher oxidizing power as compared to the first oxidizing gas, and forming a gate electrode layer on the second charge blocking layer.

Abstract translation: 一种制造非易失性存储器件的方法包括：在半导体衬底上形成电荷隧穿层，在电荷隧道层上形成电荷俘获层，在电荷俘获层上形成第一电荷阻挡层，通过提供金属源气体和第一 在电荷捕获层上氧化气体，通过在第一电荷阻挡层上提供金属源气体和第二氧化气体，在第一电荷阻挡层上形成第二电荷阻挡层，其中第二氧化气体具有较高的氧化能力， 并且在第二电荷阻挡层上形成栅极电极层。