Abstract:
A multi-phase DC-to-DC converter is configured to achieve fast transient response and to optimize efficiency over the load range. Phase shedding changes the active number of phases according to output currents. Each phase of the converter has an inductor configured to optimize the efficiency for a range of load currents in which that phase is used. A converter may have 3 phases, the first used only in sleep mode and has a large inductance with low AC losses, the second used in sync mode at low currents and having a lower inductance with low AC losses, the third phase is used in sync mode at high currents and has small inductance with low DC losses. The number of phases is ≧2.
Abstract:
A dual mode low dropout voltage regulator has a low dropout regulation mode and a bypass mode and provides a smooth transition between mode transitions taking place under load. When an accessory requires a larger voltage level, a bypass signal commands the dual mode low dropout voltage regulator to go into bypass mode and transfer voltage level of the unregulated input voltage source to the output of the dual mode low dropout voltage regulator. The dual mode low dropout voltage regulator provides a smooth transition to the bypass to prevent the output of the dual mode low dropout voltage regulator from decreasing or having a “brown out” until a pass transistor is forced to turn on fully to provide the voltage level of the unregulated input voltage source to fully bypass the low dropout regulating mode of operation.
Abstract:
Methods and circuits for CMOS relaxation oscillators are disclosed. A single capacitive element, a single current source and a switching network are utilized. A switching network of the oscillator allows both nodes of the capacitive element to rise and fall between a positive and a negative voltage with respect to ground supply, without causing leakage to substrate or risk of latch-up, i.e. the inadvertent creation of a low-impedance path. The oscillator requires minimum silicon area, has an improved duty cycle, is particular useful for implementing lower frequency clocks and is enabled for smaller technology nodes, lower than 250 nm, due to lower supply voltage.
Abstract:
A controller for controlling the illumination state of a light source of solid state lighting devices such as LED or OLED assemblies, is presented. The controller controls the light source according to a plurality of illumination states subject to determine an event of a plurality of events. The controller controls a power converter that converts power derived from an input voltage waveform of line voltage power supply into a drive signal for the light source. The controller determines an event of a plurality of events encoded within the input voltage waveform of the line voltage power supply. A first state processor determines a next illumination state of the plurality of illumination states, based on the determined event and based on the current illumination state. Line voltage Switch event detection is performed while no power is available at the line voltage terminals.
Abstract:
A power supply or driver circuit configured to provide electrical energy at a drive voltage. The driver circuit converts electrical energy at an input voltage to the electrical energy at the drive voltage. A controller is configured to control the power converter to provide electrical energy at the drive voltage. The controller stops operation at an interruption of electrical energy to the driver circuit. The controller is configured to resume operation subsequent restoration of electrical energy to the driver circuit. The controller is configured to maintain the timing voltage above a first voltage level when the controller is in operation and to determine the duration of an interruption of electrical energy to the driver circuit.
Abstract:
An electronic package is fabricated wherein a substrate is provided having three or more layers. A heat slug is embedded completely within the substrate. A die is attached above the substrate. Thermal paths to the heat slug are linked through the ground signal interconnects (traces, vias and planes).
Abstract:
A driver circuit of solid state light bulb assemblies including light emitting diodes comprises a first power converter stage converting an input voltage into an intermediate voltage; a second power converter stage converting the intermediate voltage into a drive voltage for the light source; and a controller. The controller comprises a first control unit generating a first control signal for the first power converter stage; a second control unit generating a second control signal for the second power converter stage; and a state control unit determining a target state of the light source; wherein the first and second control units are receiving information indicative of the target state; and wherein the first and second control units are generating the first and second control signals based on the information indicative of the target state.
Abstract:
A differential audio amplifier system and a related system to generate an output signal free or with only very limited clipping are disclosed. It provides a solution to solve the problem of limited electrical speaker amplifier output power available (e.g. inside battery driver applications). A differential speaker amplifier has positive and negative supply rails. In a first embodiment of the disclosure the negative supply rail is connected to the output of an inverting buck-boost converter and the positive supply rail is directly connected to VSS voltage. In a second embodiment of the disclosure the positive supply rail is connected to the output of a buck-boost converter and the negative supply rail is directly connected to a positive battery voltage.
Abstract:
In order to control of dimming of solid state lighting devices (SSL) a driver circuit drives the SSL subject to an input voltage using a phase-cut dimmer. The driver circuit comprises a transistor operable in two modes, either alternating between on/off states or continuously controlling a current through the transistor. A power converter network provides a switched-mode power converter in conjunction with the transistor when operated in the first mode generating a drive voltage for the SSL. The control unit controls the transistor to selectively operate in one of the two modes; to control the transistor to determine that the input voltage exceeds an input voltage threshold; and to control a drive current through the SSL based on a measurement of a phase-cut angle thereby controlling an illumination level of the SSL device.
Abstract:
A method and system for limiting the slew rate of the output voltage of one or more high side (HS) NMOS power switches is disclosed. A circuit arrangement configured to control a first NMOS switch is described. The arrangement comprises voltage provisioning means configured to supply a gate voltage to a gate terminal of the first NMOS switch; current provisioning means configured to provide a current; a first control stage configured to provide and/or remove a connection between the gate terminal of the first NMOS switch and the voltage provisioning means, thereby switching the first NMOS switch to an on-state and/or an off-state, respectively; and a first feedback control link between an output terminal of the first NMOS switch and the current provisioning means configured to control the slew-rate of a voltage at the first output terminal.