公开(公告)号：US20150355653A1

公开(公告)日：2015-12-10

申请号：US14632345

申请日：2015-02-26

Applicant: Dialog Semiconductor GmbH

Inventor： Stephan Drebinger ,  Roberto Curra

IPC: G05F1/575

CPC classification number: G05F1/575 ,  H03F3/34 ,  H03F3/45183 ,  H03F2200/297 ,  H03F2203/45301 ,  H03F2203/45674

Abstract: Amplifiers, notably multi-stage amplifiers, such as linear regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients are presented. An amplifier is described, which comprises a first amplification stage configured to provide an intermediate voltage, based on an outer feedback voltage and based on a reference voltage. Furthermore, the amplifier comprises an output stage configured to provide a load current at an output voltage based on the intermediate voltage. In addition, the amplifier comprises an outer feedback circuit configured to derive the outer feedback voltage from the output voltage. The output stage comprises a buffer configured to provide a drive voltage based on the intermediate voltage and based on an inner feedback voltage derived from the output voltage. The buffer comprises a pass device which is configured to provide the load current at the output voltage based on the drive voltage.

Abstract translation: 放大器，特别是多级放大器，例如被配置为提供经受负载瞬变的恒定输出电压的线性稳压器（例如低压差稳压器）。 描述了放大器，其包括第一放大级，其被配置为基于外部反馈电压并且基于参考电压提供中间电压。 此外，放大器包括输出级，其被配置为基于中间电压在输出电压下提供负载电流。 此外，放大器包括被配置为从输出电压导出外部反馈电压的外部反馈电路。 输出级包括被配置为基于中间电压提供驱动电压并基于从输出电压导出的内部反馈电压的缓冲器。 缓冲器包括通过装置，其被配置为基于驱动电压在输出电压下提供负载电流。

公开(公告)号：US08810303B2

公开(公告)日：2014-08-19

申请号：US14057046

申请日：2013-10-18

Applicant: Dialog Semiconductor GmbH

Inventor： Michael Brauer ,  Stephan Drebinger

IPC: H03K17/04 ,  H03K17/16 ,  H03K5/01 ,  H03K17/687

CPC classification number: H03K5/01 ,  H03K17/166 ,  H03K2017/6875 ,  H03K2217/0054

Abstract: A method and system for limiting the slew rate of the output voltage of one or more high side (HS) NMOS power switches is disclosed. A circuit arrangement configured to control a first NMOS switch is described. The arrangement comprises voltage provisioning means configured to supply a gate voltage to a gate terminal of the first NMOS switch; current provisioning means configured to provide a current; a first control stage configured to provide and/or remove a connection between the gate terminal of the first NMOS switch and the voltage provisioning means, thereby switching the first NMOS switch to an on-state and/or an off-state, respectively; and a first feedback control link between an output terminal of the first NMOS switch and the current provisioning means configured to control the slew-rate of a voltage at the first output terminal.

Abstract translation: 公开了一种用于限制一个或多个高侧（HS）NMOS功率开关的输出电压的转换速率的方法和系统。 描述配置成控制第一NMOS开关的电路装置。 该装置包括电压供应装置，被配置为向第一NMOS开关的栅极端提供栅极电压; 配置为提供电流的电流供应装置; 第一控制级，被配置为提供和/或去除第一NMOS开关的栅极端子和电压供应装置之间的连接，从而分别将第一NMOS开关切换到导通状态和/或截止状态; 以及第一NMOS开关的输出端子和被配置为控制第一输出端子处的电压的转换速率的电流供应装置之间的第一反馈控制链路。

公开(公告)号：US09671805B2

公开(公告)日：2017-06-06

申请号：US14632345

申请日：2015-02-26

Applicant: Dialog Semiconductor GmbH

Inventor： Stephan Drebinger ,  Roberto Curra

IPC: G05F1/575 ,  H03F3/34 ,  H03F3/45

CPC classification number: G05F1/575 ,  H03F3/34 ,  H03F3/45183 ,  H03F2200/297 ,  H03F2203/45301 ,  H03F2203/45674

Abstract: Amplifiers, notably multi-stage amplifiers, such as linear regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients are presented. An amplifier is described, which comprises a first amplification stage configured to provide an intermediate voltage, based on an outer feedback voltage and based on a reference voltage. Furthermore, the amplifier comprises an output stage configured to provide a load current at an output voltage based on the intermediate voltage. In addition, the amplifier comprises an outer feedback circuit configured to derive the outer feedback voltage from the output voltage. The output stage comprises a buffer configured to provide a drive voltage based on the intermediate voltage and based on an inner feedback voltage derived from the output voltage. The buffer comprises a pass device which is configured to provide the load current at the output voltage based on the drive voltage.

公开(公告)号：US09507357B2

公开(公告)日：2016-11-29

申请号：US14277276

申请日：2014-05-14

Applicant: Dialog Semiconductor GmbH

Inventor： Marcus Weis ,  Stephan Drebinger ,  Fabio Rigoni

IPC: G05F1/607 ,  G05F1/46 ,  G05F1/573 ,  H02M1/00

CPC classification number: G05F1/46 ,  G05F1/573 ,  H02M2001/0009

Abstract: The present document relates to a current sensing and/or control circuit with reduced sensing errors. A current control circuit for controlling a load current into an electronic device is described. The current control circuit comprises an array of control transistors configured to adjust the load current provided at an output of the array of control transistors. The load current is drawn from a power supply at an input voltage. Furthermore, the power supply is coupled to an input of the array of control transistors. The circuit further comprises a reference transistor coupled to the power supply at an input of the reference transistor and a reference current source configured to draw a reference current at an output of the reference transistor.

Abstract translation: 本文件涉及具有降低的感测误差的电流感测和/或控制电路。 描述用于控制进入电子设备的负载电流的电流控制电路。 电流控制电路包括控制晶体管阵列，其被配置为调节在控制晶体管阵列的输出处提供的负载电流。 负载电流以输入电压从电源提取。 此外，电源耦合到控制晶体管阵列的输入端。 该电路还包括在参考晶体管的输入处耦合到电源的参考晶体管和被配置为在参考晶体管的输出处绘制参考电流的参考电流源。

公开(公告)号：US09052729B2

公开(公告)日：2015-06-09

申请号：US13790401

申请日：2013-03-08

Applicant: Dialog Semiconductor GmbH

Inventor： Ambreesh Bhattad ,  Stephan Drebinger

IPC: H03F1/30 ,  G05F1/46 ,  G05F1/56 ,  G05F3/26

CPC classification number: G05F1/46 ,  G05F1/56 ,  G05F3/262 ,  H03F1/30

Abstract: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher than the output voltage and regulates the drain-source voltage of the biasing device. The disclosure reduces power consumption in a driver stage in case the supply voltage is not higher than the output voltage.

Abstract translation: 公开了在电源电压不高于输出电压的情况下通过偏置输出装置的装置来控制电流的电路和方法。 电路和方法适用于例如 LDO，放大器或缓冲器。 控制回路检测供电电压是否不高于输出电压，并调节偏置装置的漏源电压。 本发明在电源电压不高于输出电压的情况下降低了驱动级的功耗。

公开(公告)号：US20140043077A1

公开(公告)日：2014-02-13

申请号：US14057046

申请日：2013-10-18

Applicant: Dialog Semiconductor GmbH

Inventor： Michael Brauer ,  Stephan Drebinger

IPC: H03K5/01

CPC classification number: H03K5/01 ,  H03K17/166 ,  H03K2017/6875 ,  H03K2217/0054

Abstract: A method and system for limiting the slew rate of the output voltage of one or more high side (HS) NMOS power switches is disclosed. A circuit arrangement configured to control a first NMOS switch is described. The arrangement comprises voltage provisioning means configured to supply a gate voltage to a gate terminal of the first NMOS switch; current provisioning means configured to provide a current; a first control stage configured to provide and/or remove a connection between the gate terminal of the first NMOS switch and the voltage provisioning means, thereby switching the first NMOS switch to an on-state and/or an off-state, respectively; and a first feedback control link between an output terminal of the first NMOS switch and the current provisioning means configured to control the slew-rate of a voltage at the first output terminal.

Abstract translation: 公开了一种用于限制一个或多个高侧（HS）NMOS功率开关的输出电压的转换速率的方法和系统。 描述配置成控制第一NMOS开关的电路装置。 该装置包括电压供应装置，被配置为向第一NMOS开关的栅极端提供栅极电压; 配置为提供电流的电流供应装置; 第一控制级，被配置为提供和/或去除第一NMOS开关的栅极端子和电压供应装置之间的连接，从而分别将第一NMOS开关切换到导通状态和/或截止状态; 以及第一NMOS开关的输出端子和被配置为控制第一输出端子处的电压的转换速率的电流供应装置之间的第一反馈控制链路。

公开(公告)号：US20150248136A1

公开(公告)日：2015-09-03

申请号：US14712951

申请日：2015-05-15

Applicant: Dialog Semiconductor GmbH

Inventor： Ambreesh Bhattad ,  Stephan Drebinger

IPC: G05F1/56 ,  H03F1/30 ,  H03F3/45

CPC classification number: G05F1/56 ,  H03F1/0211 ,  H03F1/30 ,  H03F1/301 ,  H03F3/45179 ,  H03F2200/18 ,  H03F2200/513 ,  H03F2200/555

Abstract: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher than the output voltage and regulates the drain-source voltage of the biasing device. The disclosure reduces power consumption in a driver stage in case the supply voltage is not higher than the output voltage.

Abstract translation: 公开了在电源电压不高于输出电压的情况下通过偏置输出装置的装置来控制电流的电路和方法。 电路和方法适用于例如 LDO，放大器或缓冲器。 控制回路检测供电电压是否不高于输出电压，并调节偏置装置的漏源电压。 本发明在电源电压不高于输出电压的情况下降低了驱动级的功耗。

公开(公告)号：US09400514B2

公开(公告)日：2016-07-26

申请号：US14712951

申请日：2015-05-15

Applicant: Dialog Semiconductor GmbH

Inventor： Ambreesh Bhattad ,  Stephan Drebinger

IPC: G05F1/56 ,  H03F1/30 ,  H03F1/02 ,  H03F3/45

CPC classification number: G05F1/56 ,  H03F1/0211 ,  H03F1/30 ,  H03F1/301 ,  H03F3/45179 ,  H03F2200/18 ,  H03F2200/513 ,  H03F2200/555

Abstract: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher than the output voltage and regulates the drain-source voltage of the biasing device. The disclosure reduces power consumption in a driver stage in case the supply voltage is not higher than the output voltage.

公开(公告)号：US20150137774A1

公开(公告)日：2015-05-21

申请号：US14277276

申请日：2014-05-14

Applicant: Dialog Semiconductor GmbH

Inventor： Marcus Weis ,  Stephan Drebinger ,  Fabio Rigoni

IPC: G05F1/46

CPC classification number: G05F1/46 ,  G05F1/573 ,  H02M2001/0009

Abstract: The present document relates to a current sensing and/or control circuit with reduced sensing errors. A current control circuit for controlling a load current into an electronic device is described. The current control circuit comprises an array of control transistors configured to adjust the load current provided at an output of the array of control transistors. The load current is drawn from a power supply at an input voltage. Furthermore, the power supply is coupled to an input of the array of control transistors. The circuit further comprises a reference transistor coupled to the power supply at an input of the reference transistor and a reference current source configured to draw a reference current at an output of the reference transistor.

Abstract translation: 本文件涉及具有降低的感测误差的电流感测和/或控制电路。 描述用于控制进入电子设备的负载电流的电流控制电路。 电流控制电路包括控制晶体管阵列，其被配置为调节在控制晶体管阵列的输出处提供的负载电流。 负载电流以输入电压从电源提取。 此外，电源耦合到控制晶体管阵列的输入端。 该电路还包括在参考晶体管的输入处耦合到电源的参考晶体管和被配置为在参考晶体管的输出处绘制参考电流的参考电流源。

公开(公告)号：US20140247087A1

公开(公告)日：2014-09-04

申请号：US13790401

申请日：2013-03-08

Applicant: DIALOG SEMICONDUCTOR GMBH

Inventor： Ambreesh Bhattad ,  Stephan Drebinger

IPC: G05F1/46

CPC classification number: G05F1/46 ,  G05F1/56 ,  G05F3/262 ,  H03F1/30

Abstract: Circuits and methods to control current through a device biasing an output device in case the supply voltage is not higher than the output voltage are disclosed. The circuits and methods are applicable to e.g. LDOs, amplifiers, or buffers. A control loop detects if the supply voltage is not higher than the output voltage and regulates the drain-source voltage of the biasing device. The disclosure reduces power consumption in a driver stage in case the supply voltage is not higher than the output voltage.

Abstract translation: 公开了在电源电压不高于输出电压的情况下通过偏置输出装置的装置来控制电流的电路和方法。 电路和方法适用于例如 LDO，放大器或缓冲器。 控制回路检测供电电压是否不高于输出电压，并调节偏置装置的漏源电压。 本发明在电源电压不高于输出电压的情况下降低了驱动级的功耗。