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公开(公告)号:US07866708B2
公开(公告)日:2011-01-11
申请号:US10708517
申请日:2004-03-09
申请人: Craig D. Johnson , Matthew R. Hackworth , Michael D. Langlais , David Wei Wang , Laurent Alteirac , Stephane J. Virally , Jason Bigelow , Kerby J. Dufrene , Bruno Khan , Martin Prado , Ashish Sharma
发明人: Craig D. Johnson , Matthew R. Hackworth , Michael D. Langlais , David Wei Wang , Laurent Alteirac , Stephane J. Virally , Jason Bigelow , Kerby J. Dufrene , Bruno Khan , Martin Prado , Ashish Sharma
IPC分类号: F16L17/00
摘要: An apparatus includes a connector to connect a first tubing section and a second tubing section together. The connector that includes a body that includes a first opening to receive the first tubing section, a second opening to receive the second tubing section, and a passageway. The apparatus includes a member that is adapted to be moved from a retracted position to an extended position to form a sealed connection between a tubular member that is connected to the first tubing section and the passageway.
摘要翻译: 一种装置包括将第一管段和第二管段连接在一起的连接器。 该连接器包括主体,该主体包括用于接纳第一管段的第一开口,用于接纳第二管段的第二开口和通道。 该装置包括适于从缩回位置移动到延伸位置的构件,以在与第一管段连接的管状构件和通道之间形成密封连接。
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公开(公告)号:US07847414B2
公开(公告)日:2010-12-07
申请号:US12147929
申请日:2008-06-27
申请人: Geng-Shin Shen , David Wei Wang
发明人: Geng-Shin Shen , David Wei Wang
IPC分类号: H01L23/48 , H01L23/538 , H01L29/40
CPC分类号: H01L25/0657 , H01L24/73 , H01L24/81 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13144 , H01L2224/13147 , H01L2224/16 , H01L2224/48091 , H01L2224/48227 , H01L2224/73265 , H01L2224/8121 , H01L2224/81815 , H01L2224/83193 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A chip package structure including a first substrate, a second substrate, a plurality of bumps, a first B-staged adhesive layer and a second B-staged adhesive layer is provided. The first substrate has a plurality of first bonding pads. The second substrate has a plurality of second bonding pads, and the second substrate is disposed above the first substrate. The bumps are disposed between the first substrate and the second substrate, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps. The first B-staged adhesive layer is adhered on the first substrate. The second B-staged adhesive layer is adhered between the first B-staged adhesive layer and the second substrate, wherein the first B-staged adhesive layer and the second B-staged adhesive layer encapsulate the bumps.
摘要翻译: 提供了包括第一基板,第二基板,多个凸块,第一B阶粘合剂层和第二B阶粘合剂层的芯片封装结构。 第一基板具有多个第一接合焊盘。 第二基板具有多个第二接合焊盘,第二基板设置在第一基板的上方。 所述凸块设置在所述第一基板和所述第二基板之间,其中所述第一接合焊盘中的每一个分别经由所述凸块之一电连接到所述第二接合焊盘中的一个。 第一B级粘合剂层粘附在第一基底上。 第二B阶粘合剂层粘附在第一B阶粘合剂层和第二基底之间,其中第一B阶粘合剂层和第二B阶粘合剂层包封凸块。
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公开(公告)号:US07798212B2
公开(公告)日:2010-09-21
申请号:US11380303
申请日:2006-04-26
IPC分类号: E21B17/02
CPC分类号: E21B33/038 , E21B17/02 , F16L37/56 , F16L39/00 , F16L57/005
摘要: A technique is provided to facilitate connection of completion assemblies at a downhole location. A completion assembly comprises a control line conduit having a connector designed for coupling with a corresponding connector of a next adjacent completion assembly. A cover is selectively used to block entry of debris and other contaminants into the connector during deployment of the completion assembly downhole prior to engagement with the next adjacent completion of assembly.
摘要翻译: 提供了一种技术来便于在井下位置连接完井组件。 完成组件包括具有设计成与下一个相邻完成组件的相应连接器联接的连接器的控制线导管。 在与下一个相邻的组装完成接合之前,选择性地使用盖子来阻挡碎片和其它污染物进入到连接器中以在井下完成组件的部署过程中。
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公开(公告)号:US07749806B2
公开(公告)日:2010-07-06
申请号:US12169120
申请日:2008-07-08
申请人: Geng-Shin Shen , David Wei Wang
发明人: Geng-Shin Shen , David Wei Wang
IPC分类号: H01L21/00
CPC分类号: H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provide, wherein a plurality of bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first B-staged adhesive layer and the second B-staged adhesive layer such that each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译: 提供了芯片封装结构的制造工艺。 首先,提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板,其中在第一基板的第一接合焊盘上形成多个凸点。 在第一基板上形成第一两层粘合剂层,并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层,并且被B阶段化以形成第二B阶粘合剂层。 然后,第一基板和第二基板经由第一B阶粘合剂层和第二B阶粘合剂层接合,使得每个第一接合焊盘分别经由第一接合焊盘中的一个电连接到第二接合焊盘中的一个 颠簸
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公开(公告)号:US20100151624A1
公开(公告)日:2010-06-17
申请号:US12714646
申请日:2010-03-01
申请人: Geng-Shin Shen , David Wei Wang
发明人: Geng-Shin Shen , David Wei Wang
IPC分类号: H01L21/50
CPC分类号: H01L24/90 , H01L24/12 , H01L24/16 , H01L24/28 , H01L24/29 , H01L24/32 , H01L24/73 , H01L24/83 , H01L25/0657 , H01L25/50 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2224/13565 , H01L2224/1601 , H01L2224/16145 , H01L2224/2919 , H01L2224/32145 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2224/73265 , H01L2224/81141 , H01L2224/81191 , H01L2224/81193 , H01L2224/83192 , H01L2224/83194 , H01L2224/83856 , H01L2225/0651 , H01L2225/06513 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2924/00012 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要: A fabricating process of a chip package structure is provided. First, a first substrate having a plurality of first bonding pads and a second substrate having a plurality of second bonding pads are provided, wherein bumps are formed on the first bonding pads of the first substrate. A first two-stage adhesive layer is formed on the first substrate and is B-stagized to form a first B-staged adhesive layer. A second two-stage adhesive layer is formed on the second substrate and is B-stagized to form a second B-staged adhesive layer. Then, the first substrate and the second substrate are bonded via the first and second B-staged adhesive layer such that the bumps pierce through the second B-staged adhesive layer and are electrically connected to the second bonding pads, wherein each of the first bonding pads is respectively electrically connected to one of the second bonding pads via one of the bumps.
摘要翻译: 提供了芯片封装结构的制造工艺。 首先,提供具有多个第一接合焊盘的第一基板和具有多个第二接合焊盘的第二基板,其中在第一基板的第一接合焊盘上形成凸块。 在第一基板上形成第一两层粘合剂层,并将其B层状化以形成第一B阶粘合剂层。 在第二基板上形成第二两层粘合剂层,并且被B阶段化以形成第二B阶粘合剂层。 然后,第一基板和第二基板经由第一和第二B阶粘合剂层接合,使得凸块穿过第二B阶粘合剂层并电连接到第二接合焊盘,其中第一接合 焊盘经由凸块之一分别电连接到第二接合焊盘之一。
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公开(公告)号:US5668059A
公开(公告)日:1997-09-16
申请号:US679648
申请日:1996-07-12
CPC分类号: H01L24/81 , H01L21/563 , H01L23/293 , H01L2224/73203 , H01L2224/81801 , H01L2224/83856 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01023 , H01L2924/01025 , H01L2924/01029 , H01L2924/0103 , H01L2924/01049 , H01L2924/0105 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H05K3/284 , H05K3/285 , H05K3/3431 , Y10T428/31504 , Y10T428/31547
摘要: Solder interconnection encapsulant, encapsulated structure and method for its fabrication and use, whereby the gap created by solder connections between a carrier substrate and a semiconductor device is filled with a composition obtained from curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof; filler, e.g., an aluminum nitride or aluminum oxide filler, having a maximum particle size of 31 microns.
摘要翻译: 焊接互连密封剂,封装结构及其制造和使用方法,由此通过固化含有脂环族聚环氧化物和/或可固化氰酸酯的制剂获得的组合物填充载体基底和半导体器件之间的焊料连接所产生的间隙,或 其预聚物; 填料,例如氮化铝或氧化铝填料,其最大粒度为31微米。
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