TTL circuit
    31.
    发明授权
    TTL circuit 失效
    TTL电路

    公开(公告)号:US3934157A

    公开(公告)日:1976-01-20

    申请号:US508081

    申请日:1974-09-23

    IPC分类号: H03K19/088 H03K19/08 H03K5/01

    CPC分类号: H03K19/088

    摘要: A logic gate circuit includes parallel drive of an output transistor and an inverter transistor by an input transistor. The inverter transistor then drives an active pull-up transistor which improves switching speed. The parallel drive of the invention allows the use of the active pull-up transistor without requiring a change in circuit voltage levels.

    摘要翻译: 逻辑门电路包括输入晶体管的并联驱动和由输入晶体管构成的反相器晶体管。 逆变器晶体管然后驱动有源上拉晶体管,其提高了开关速度。 本发明的并联驱动器允许使用有源上拉晶体管,而不需要电路电压电平的变化。

    Bistable electronic circuit
    32.
    发明授权
    Bistable electronic circuit 失效
    双电子电路

    公开(公告)号:US3845330A

    公开(公告)日:1974-10-29

    申请号:US28819172

    申请日:1972-09-11

    发明人: COLONEL C

    摘要: A flip-flop having a rapid response time, wherein delays in response to changes in input signals and propagation time therethrough are minimized by circuit configurations which minimize logical inversion functions.

    摘要翻译: 具有快速响应时间的触发器,其中响应于输入信号的变化和传播时间的延迟通过使逻辑反转功能最小化的电路配置而被最小化。

    Logic circuit using a current switch to compensate for signal deterioration
    33.
    发明授权
    Logic circuit using a current switch to compensate for signal deterioration 失效
    使用电流开关补偿信号检测的逻辑电路

    公开(公告)号:US3828202A

    公开(公告)日:1974-08-06

    申请号:US33370573

    申请日:1973-02-20

    申请人: BURROUGHS CORP

    发明人: STOPPER HERBERT

    摘要: An improved logic circuit comprising an input semiconductor, an output semiconductor and a current switch connected therebetween to compensate for signal deterioration in the logic circuit. The input semiconductor is biased to remain unsaturated in response to a binary signal swing at an input terminal. In an AND gate, the input semiconductor is a multi-emitter transistor; in an OR gate, the input semiconductor is a plurality of transistors.

    摘要翻译: 一种改进的逻辑电路,包括输入半导体,输出半导体和连接在其间的电流开关,以补偿逻辑电路中的信号劣化。 响应于在输入端子处的二进制信号摆幅,输入半导体被偏置以保持不饱和。 在与门中,输入半导体是多发射极晶体管; 在或门中,输入半导体是多个晶体管。

    Transistor-transistor logic circuits having improved voltage transfer characteristics

    公开(公告)号:USRE27804E

    公开(公告)日:1973-10-30

    申请号:US27804D

    申请日:1971-01-21

    IPC分类号: H03K19/088

    CPC分类号: H03K19/088

    摘要: TRANSISTOR-TRANSISTOR LOGIC (TTL) CIRCUITRY HAVING A BYPASS NETWORK CONNECTED TO THE OUTPUT DEVICE OF THE CIRCUITRY FOR PROVIDING TURN OFF DRIVE FOR THE OUTPUT DEVICE. THE BYPASS NETWORK INCLUDES A RESISTOR CONNECTED IN SERIES WITH AT LEAST ONE PN JUNCTION, AND SUCH PN

    JUNCTION IS WITHIN EITHER A SIMPLE DIODE OR A TRANSISTOR. THE BYPASS NETWORK PREVENTS UNDESIRABLE SPIKING IN THE OUTPUT SIGNAL OF THE TTL LOGIC CIRCUITRY.

    Transistor switching circuit
    35.
    发明授权
    Transistor switching circuit 失效
    晶体管开关电路

    公开(公告)号:US3769524A

    公开(公告)日:1973-10-30

    申请号:US3769524D

    申请日:1972-06-27

    申请人: IBM

    发明人: MATHEWS K

    CPC分类号: H03K19/013 H03K19/01806

    摘要: A bistable transistor switching circuit comprising a bipolar transistor adapted to switch states in response to a base node voltage. The circuit further comprises two negative feedback paths. The first comprises a voltage feedback path in which the potential at the transistor emitter terminal responds to a change in emitter current, and the other feedback path comprises a current feedback path through a non-linear impedance located between collector and base terminals.

    摘要翻译: 一种双稳态晶体管开关电路,包括适于响应于基极节点电压而切换状态的双极晶体管。 电路还包括两个负反馈路径。 第一个包括电压反馈路径,其中晶体管发射极端子处的电位响应于发射极电流的变化,另一个反馈路径包括通过位于集电极和基极端子之间的非线性阻抗的电流反馈路径。

    Gate circuit with ttl input and complimentary outputs
    36.
    发明授权
    Gate circuit with ttl input and complimentary outputs 失效
    具有TTL输入和合并输出的门电路

    公开(公告)号:US3654490A

    公开(公告)日:1972-04-04

    申请号:US3654490D

    申请日:1970-06-17

    申请人: SIGNETICS CORP

    发明人: KAN DAVID T

    IPC分类号: H03K19/088 H03K17/60

    CPC分类号: H03K19/088

    摘要: A gate circuit having a TTL input characteristic with the input transistor forming in effect two steering diodes driving a phase splitter which has its collector and emitter respectively driving two complementary output transistors. The collectors of the output transistors coupled together form the output terminal of the gate circuit and the emitter of one of the output transistors is coupled to a high voltage supply. This output transistor is also coupled to the phase splitter through an inverting current source.

    摘要翻译: 具有输入晶体管的TTL输入特性的门电路实际上形成了驱动具有其集电极和发射极分别驱动两个互补输出晶体管的相分离器的两个导向二极管。 耦合在一起的输出晶体管的集电极形成栅极电路的输出端,并且一个输出晶体管的发射极耦合到高压电源。 该输出晶体管还通过反相电流源耦合到分相器。

    Memory selection apparatus
    37.
    发明授权
    Memory selection apparatus 失效
    记忆选择装置

    公开(公告)号:US3588851A

    公开(公告)日:1971-06-28

    申请号:US3588851D

    申请日:1967-10-13

    申请人: HONEWYELL INC

    摘要: ELECTRONIC SELECTION CIRCUITS FOR OPERATING COINCIDENT-CURRENT MAGNETIC MEMORIES, AND LIKE APPARATUS, ARE PROVIDED FOR CONSTRUCTION ESSENTIALLY ENTIRELY AS INTEGRATED CIRCUITS, EVEN THE OUTPUT DRIVE STAGES. THE CIRCUITS ARE ARRANGED TO TRANSFORM GROUND-REFERENCED INPUT SIGNALS TO OUTPUT SIGNALS FOR DRIVING FLOATING REACTANCES WITHOUT THE TRANSFORMERS REQUIRED IN THE PRIOR ART FOR VOLTAGE ISOLATION. FURTHER, THE NEW CIRCUITS DRIVE THESE REACTIVE LOADS WITHOUT EXCESSIVE POWER DISSIPATION OR EXCESSIVE TRANSIENT VOLTAGES.