公开(公告)号：US09817586B2

公开(公告)日：2017-11-14

申请号：US15134361

申请日：2016-04-20

申请人： Samsung Electronics Co., Ltd.

发明人： Fei Liu ,  Yang Seok Ki ,  Xiling Sun

IPC分类号： G06F3/00 ,  G06F13/00 ,  G06F3/06 ,  G06F13/26 ,  G06F13/22

CPC分类号： G06F3/0611 ,  G06F3/0659 ,  G06F3/067 ,  G06F13/22 ,  G06F13/26

摘要： A system and method for enabling an application (125, 305, 310, 315) and a storage device (120) to be more aware of each other may include a computer (105), a processor (110), and a memory (115) as well as the storage device (120). An application (125, 305, 310, 315) stored in the memory may communicate with a user space device driver (130). The user space device driver (130) may include a Mode Configure Module (320) to receive an application profile (405, 430, 435) from the application (125, 305, 310, 315) and an Application Aware Module (325) to receive I/O commands (555) from the application (125, 305, 310, 315) and place them in command queues (510, 515, 520, 525, 535, 540, 545, 550) according to the application profile (405, 430, and 435). The I/O commands (555) may then be sent to the storage device (120).

公开(公告)号：US09811484B1

公开(公告)日：2017-11-07

申请号：US14319127

申请日：2014-06-30

申请人： ALTERA CORPORATION

发明人： Shane O'Connell

IPC分类号： G06F13/24 ,  G06F13/26 ,  G06F13/32 ,  G06F13/28

CPC分类号： G06F13/24 ,  G06F13/287

摘要： The present disclosure provides methods and apparatus for rapid interrupt look-ups for interrupts stored in memory. One embodiment relates to a method for providing interrupt lookups for a plurality of interrupt status vectors stored in random access memory on an integrated circuit. The plurality of interrupt status vectors in the random access memory are scanned to find activated interrupt status vectors that changed from null to non-null and dismissed interrupt status vectors that changed from non-null to null. A linked search list is maintained in the random access memory by inserting memory addresses of the activated interrupt status vectors into the linked search list and removing memory addresses of the dismissed interrupt status vectors from the linked search list. Interrupt status vectors for currently active interrupts are looked-up by transversing the linked search list in the random access memory. Other embodiments, aspects and features are also disclosed herein.

公开(公告)号：US20170315942A1

公开(公告)日：2017-11-02

申请号：US15358135

申请日：2016-11-22

申请人： NXP USA, INC.

发明人： Liang Jia ,  Zhijun Chen ,  Zhiling Sui

IPC分类号： G06F13/26 ,  G06F13/42

CPC分类号： G06F13/26 ,  G06F13/4221

摘要： A multi-core processor manages contention amongst its cores for access to a shared resource using a semaphore that maintains separate access-request queues for different cores and uses a selectable scheduling algorithm to grant pending requests, one at a time. The semaphore signals the core whose request is granted by sending it an interrupt signal using a dedicated core line that is not part of the system bus. The granted request is then de-queued, and the core accesses the shared resource in response to receiving the interrupt signal. The use of dedicated core lines for transmitting interrupt signals from the semaphore to the cores alleviates the need for repeated polling of the semaphore on the system bus. The use of the scheduling algorithm prevents a potential race condition between contending cores.

公开(公告)号：US09779043B2

公开(公告)日：2017-10-03

申请号：US15335047

申请日：2016-10-26

申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION

发明人： Richard L. Arndt ,  Florian A. Auernhammer

IPC分类号： G06F13/24 ,  G06F13/32 ,  G06F3/00 ,  G06F5/00 ,  G06F13/26 ,  G06F9/54

CPC分类号： G06F13/26 ,  G06F9/542 ,  G06F12/12 ,  G06F12/122 ,  G06F13/24 ,  G06F13/28 ,  G06F13/4068 ,  G06F2212/70

摘要： A technique for handling queued interrupts includes accumulating respective backlog counts for respective event paths. The background counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads. In response to a lowering of an operating priority (OP) of a VP thread (VPT), a scan backlog (SB) message is received that identifies the VPT and specifies a current operating priority for the VPT. In response to receiving the SB message, a linked list of event paths associated with the VPT is scanned to search for backlog events that have a higher priority than the current OP for the VPT. In response to a backlog event being located that has a higher priority than the current OP of the VPT, an interrupt to the VPT is initiated starting with a highest priority event path and the backlog count for the VPT is decremented.

公开(公告)号：US09697086B2

公开(公告)日：2017-07-04

申请号：US12828213

申请日：2010-06-30

申请人： Michael John Dutch ,  Christopher Hercules Claudatos ,  Mandavilli Navneeth Rao

发明人： Michael John Dutch ,  Christopher Hercules Claudatos ,  Mandavilli Navneeth Rao

IPC分类号： G06F13/00 ,  G06F11/14 ,  G06F13/26 ,  G06F13/38

CPC分类号： G06F11/1448 ,  G06F11/1466 ,  G06F11/1469 ,  G06F13/26 ,  G06F13/385

摘要： A method, article of manufacture, and apparatus for accessing data during data recovery. In some embodiments, this includes sending an I/O request from an application to an object, wherein the object is being recovered, establishing an I/O intercept, intercepting the application's I/O request with the I/O intercept, and redirecting the I/O request based on the status of the object's sub-objects.

公开(公告)号：US09645955B1

公开(公告)日：2017-05-09

申请号：US14183704

申请日：2014-02-19

申请人： Google Inc.

发明人： John Wilkes ,  Brian Grant ,  Luc Mercier ,  Todd Pu-Tse Wang

IPC分类号： G06F13/24 ,  G06F13/26 ,  G06F9/48

CPC分类号： G06F13/24 ,  G06F9/48 ,  G06F9/4812 ,  G06F11/00 ,  G06F13/26

摘要： A system is provided that includes a memory and one or more processors in communication with the memory. The one or more processors are configured to identify a set of targets and select a first value corresponding to a number of targets from the set of targets that can be concurrently disrupted. A second value is determined that is related to a number of disruptions actually occurring. A disruption request is received for a target of the set of targets. Thereafter, the first value is compared to the second value. Based on the comparison of the first and second values, it is determined whether to resist a requested disruption. If it is determined that the disruption is to be resisted, the requested disruption is resisted. If it is determined that the disruption is not to be resisted, at least one of the first value and the second value are adjusted.

公开(公告)号：US09575525B2

公开(公告)日：2017-02-21

申请号：US13777702

申请日：2013-02-26

申请人： RENESAS ELECTRONICS CORPORATION

发明人： Masahiro Asano ,  Yuriko Nishihara

IPC分类号： G06F1/26 ,  H04L12/40 ,  H03B1/00 ,  G06F13/24 ,  G06F13/26 ,  G06F15/17

CPC分类号： G06F1/26 ,  G06F1/3234 ,  G06F13/36 ,  H04L12/40013 ,  H04L12/40039 ,  Y02D10/14 ,  Y02D50/20

摘要： Power supply of ECUs connected to a communication network is optimally controlled so that power consumption is reduced. A transceiver/receiver converts a message of a differential signal received via a CAN bus into a digital signal. A select circuit determines whether the converted message is in a CAN format or a UART format. If it is in the UART format, the select circuit outputs a message to the UART circuit. A UART circuit determines whether the message matches a UART format. If matched, an ID determination circuit determines whether the input message is specifying a CAN ID of its own ECU. If it is the CAN ID of the ECU, the ID determination circuit outputs an enable signal to turn on a regulator and supply power to an MCU and an actuator.

摘要翻译： 连接到通信网络的ECU的电源被最佳地控制，从而降低功耗。 收发器/接收器将经由CAN总线接收的差分信号的消息转换为数字信号。 选择电路确定转换的消息是CAN格式还是UART格式。 如果是UART格式，选择电路会向UART电路输出一个消息。 UART电路确定消息是否匹配UART格式。 如果匹配，则ID确定电路确定输入消息是否指定其自己的ECU的CAN ID。 如果是ECU的CAN ID，则ID确定电路输出使能信号以打开调节器并向MCU和致动器供电。

公开(公告)号：US20160378698A1

公开(公告)日：2016-12-29

申请号：US14751934

申请日：2015-06-26

申请人： Intel IP Corporation

发明人： Sampath Malalangaradass

IPC分类号： G06F13/26

CPC分类号： G06F13/26

摘要： A processor includes a core and an interrupt control unit. The core includes logic to handle an interrupt. The interrupt control unit includes logic to receive another interrupt. Furthermore, the interrupt control unit includes logic to conditionally dispatch the new interrupt to the core based upon priority of the interrupts and time spent by the new interrupt waiting for dispatch to the core.

摘要翻译： 处理器包括核心和中断控制单元。 核心包括处理中断的逻辑。 中断控制单元包括接收另一个中断的逻辑。 此外，中断控制单元包括基于中断的优先级和等待发送到核的新中断花费的时间来有条件地将新的中断分配给核的逻辑。

公开(公告)号：US20160378543A1

公开(公告)日：2016-12-29

申请号：US14876831

申请日：2015-10-07

申请人： VMWARE, INC.

发明人： ANDREI WARKENTIN ,  Irfan Ulla Khan ,  Cyprien Laplace ,  Harvey Tuch ,  Alexander Fainkichen

IPC分类号： G06F9/48 ,  G06F13/26

CPC分类号： G06F9/4818 ,  G06F13/26

摘要： A method is provided for handling interrupts in a processor, the interrupts including regular interrupts having a range of priorities and a pseudo non-maskable interrupt (PNMI) that is of a higher priority than any of the regular interrupts. The method includes the steps of obtaining an interrupt vector corresponding to a received interrupt, and if the received interrupt is a regular interrupt, enabling interrupts in the processor so that a PNMI can be received while handling the regular interrupt, executing a regular interrupt handler using the interrupt vector, and disabling interrupts in the processor. On the other hand, if the received interrupt is a PNMI, a PNMI interrupt handler is executed using the interrupt vector as an input thereto.

摘要翻译： 提供了一种用于处理处理器中断的方法，所述中断包括具有优先级范围的规则中断和比任何常规中断更高优先级的伪不可屏蔽中断（PNMI）。 该方法包括获得与接收到的中断相对应的中断向量的步骤，并且如果接收到的中断是常规中断，则允许处理器中的中断，使得在处理常规中断时可以接收PNMI，执行常规中断处理程序使用 中断向量和禁用处理器中断。 另一方面，如果接收到的中断是PNMI，则使用中断向量作为其输入来执行PNMI中断处理程序。

公开(公告)号：US09529746B2

公开(公告)日：2016-12-27

申请号：US14347890

申请日：2012-09-19

申请人： ROBERT BOSCH GMBH

发明人： Andreas-Juergen Rohatschek ,  Dieter Thoss ,  Thorsten Huck ,  Stoyan Todorov

IPC分类号： G06F13/26 ,  H04L12/423

CPC分类号： G06F13/26 ,  H04L12/423

摘要： A method for transmitting frames containing data between users of a ring-shaped communication system which has a master and at least one slave as users. Each user has at least one interrupt register, and one field of the at least one interrupt register is associated with an interrupt request and includes a value for an interrupt bit. An interrupt request which includes the interrupt bit is transmitted to the master by a slave in a frame designed as an empty frame. In addition, the empty frame has a toggle bit for all slaves which indicates the state of an interrupt request.

摘要翻译： 一种用于在具有主设备和至少一个从设备的环形通信系统的用户之间发送包含数据的帧的方法。 每个用户具有至少一个中断寄存器，并且至少一个中断寄存器的一个字段与中断请求相关联并且包括中断位的值。 包含中断位的中断请求在被设计为空帧的帧中由从机发送给主机。 此外，空帧对于所有从站都有一个切换位，指示中断请求的状态。