-
公开(公告)号：US09589523B2
公开(公告)日：2017-03-07
申请号：US14765791
申请日：2015-04-30
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao
CPC classification number: G09G3/3677 , G09G3/20 , G09G2310/0251 , G09G2310/0267 , G09G2310/0286 , G09G2310/06 , G09G2310/08 , G09G2330/021
Abstract: A GOA circuit comprising GOA units and a liquid crystal display are disclosed. The N-staged GOA units charge the Nth-staged horizontal scanning line in the display region, and comprise N-staged pull-up control circuits, N-staged pull-up circuits, N-staged transfer circuits, N-staged pull-down circuits, and N-staged pull-down holding circuits. The N-staged pull-up circuits turn on when the Nth-staged gate signal point is at a high voltage level, receive a first clock signal and charge the N-staged horizontal scanning lines when the first clock signal is at a high voltage level. The N-staged transfer circuits receive a second clock signal when the Nth-staged gate signal point is at the high voltage level and output N-staged transfer signals to control the operation of the (N+1)-staged GOA units. The disclosure may ensure the scanning lines in the GOA circuit to be better charged for facilitating normal operation for each point in the circuit.
Abstract translation: 公开了一种包括GOA单元和液晶显示器的GOA电路。 N级GOA单元对显示区域的第N级水平扫描线进行充电，并且包括N级上拉控制电路，N级上拉电路，N级分接电路，N级分接拉 电路和N级下拉保持电路。 当第N级门信号点处于高电压电平时，N级上拉电路接通，当第一时钟信号处于高电压电平时接收第一时钟信号并为N级水平扫描线充电 。 当第N阶门控信号点处于高电压电平时，N级转移电路接收第二时钟信号，并输出N级的传输信号以控制（N + 1）级的GOA单元的操作。 本公开可以确保GOA电路中的扫描线更好地充电以便于电路中的每个点的正常操作。
-
公开(公告)号：US11201247B2
公开(公告)日：2021-12-14
申请号：US16942800
申请日：2020-07-30
Inventor： Juncheng Xiao , Chao Tian
IPC: H01L29/786 , H01L29/66 , H01L27/12
Abstract: The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.
-
公开(公告)号：US20210313364A1
公开(公告)日：2021-10-07
申请号：US16955112
申请日：2020-04-17
Inventor： Zhifu LI , Juncheng Xiao , Fei Al , Jiyue Song
IPC: H01L27/146 , G02F1/1333 , G02F1/1368 , G02F1/133 , G06F3/041 , G06K9/00
Abstract: The present disclosure provides an array substrate and a display panel. The array substrate includes a substrate, a thin film transistor layer, and a fingerprint identification component. Through horizontally disposing a switching element and a fingerprint identification element of the fingerprint identification component in the thin film transistor layer, the fingerprint identification element and the switching element can be manufactured with the thin film transistor layer at a same time, which can reduce a thickness of the panel, and a structure thereof is simple and not complicated.
-
公开(公告)号：US11127363B2
公开(公告)日：2021-09-21
申请号：US16302678
申请日：2018-08-16
Inventor： Xin Zhang , Juncheng Xiao , Chao Tian , Yanqing Guan
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a liquid crystal panel comprising the GOA circuit, and a display device including the liquid crystal panel are provided. The GOA circuit comprises a forward and backward scanning control module configured to control the GOA circuit to perform forward scan or backward scan according to a forward scanning signal or a backward scanning signal respectively, a first voltage stabilizing module configured to maintain a voltage level of a first node, and a second voltage stabilizing module electrically connecting to the forward and backward scanning control module, and configured to maintain a voltage level of an output signal of the forward and backward scanning control module.
-
公开(公告)号：US10204579B2
公开(公告)日：2019-02-12
申请号：US14889423
申请日：2015-10-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao , Shangcao Cao , Ronglei Dai , Yao Yan
Abstract: A GOA circuit, a display device, and a driving method of GOA circuit are disclosed. A N-th level GOA unit is configured for charging the N-th level horizontal scanning line (G(N)) within a display area of the display device. The N-th level horizontal scanning line (G(N)) connects to GAS. In response to the GAS, the horizontal scanning lines corresponding to all of the GOA units are in a charging state. In this way, the horizontal scanning lines at each level are connected to the GAS, such that when the GAS are valid, the corresponding horizontal scanning line at each level are in the charging state of in an on-state so as to realize the All Gate On function.
-
Patent Agency Ranking
公开(公告)号：US10121433B2
公开(公告)日：2018-11-06
申请号：US14895601
申请日：2015-11-06
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng Xiao , Ronglei Dai , Shangcao Cao , Yao Yan
IPC: G09G3/36
Abstract: A gate on array (GOA) circuit for used in an LCD includes GOA units connected in cascade. An Nth GOA unit includes an Nth stage-transmittance circuit, an Nth Q-node controlling circuit, an Nth P-node controlling circuit, an Nth outputting circuit, and a first switch circuit where N is a positive integer. The first switch circuit connected to the Nth scanning line, for inputting an enabling signal to the Nth scanning line before the LCD shows images so as to turn on a TFT in a pixel which the Nth scanning line is connected to. The benefit of the function is that the display does not leak electricity when the black screen is woken up and that the stability of the circuit is enhanced at the same time.
-
公开(公告)号：US09959830B2
公开(公告)日：2018-05-01
申请号：US15026256
申请日：2016-02-24
Inventor： Juncheng Xiao , Yao Yan , Ronglei Dai , Shangcao Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/36 , G09G3/3648 , G09G2300/0408 , G09G2310/0289 , G09G2310/08 , G09G2330/023 , G09G2340/145
Abstract: The present invention provides a GOA circuit, comprising a forward-backward scan control module, an output module, an output pull-down module, a node control module, a second node signal input module, a second node signal control module, a voltage stabilizing module and a second capacitor; the forward scan of the circuit is controlled with the ninth and the tenth thin film transistors, and the signal input of the second node is controlled with the first and the eleventh thin film transistors, and the mutual control of the first node and the second node are achieved with the second, the fourth and the fifth thin film transistors, and meanwhile, as the GOA circuit applies to a display of dual side drive interlaced scan structure, the GOA circuits of the two sides can respectively receive four different clock signals to reduce the loading of the signal line of the GOA circuit.
-
公开(公告)号：US09946394B2
公开(公告)日：2018-04-17
申请号：US14909178
申请日：2015-11-23
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Shangcao Cao , Juncheng Xiao
IPC: G06F3/041 , G06F3/044 , G02F1/1333 , G02F1/1345
CPC classification number: G06F3/0416 , G02F1/13338 , G02F1/13454 , G06F1/3262 , G06F3/044 , G09G3/20 , G09G3/36 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2354/00 , G11C19/28
Abstract: A gate driver includes a plurality of gate driver units. Each of the gate driver units includes a GOA driving circuit and at least one buffer GOA driving circuits at multiple levels. The GOA driving circuit outputs output signals during a display stage, wherein the output signals are transmitted to gate lines and the buffer GOA driving circuits at multiple levels. The output signals are transmitted between the levels when the buffer GOA driving circuits at the multiple levels are during a touch stage, and the output signals are transmitted to the GOA driving circuit of the driving unit at the next level. In addition, a touch panel includes the above gate driver.
-
公开(公告)号：US20180068628A1
公开(公告)日：2018-03-08
申请号：US15026256
申请日：2016-02-24
Inventor： Juncheng Xiao , Yao Yan , Ronglei Dai , Shangcao Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G3/36 , G09G3/3648 , G09G2300/0408 , G09G2310/0289 , G09G2310/08 , G09G2330/023 , G09G2340/145
Abstract: The present invention provides a GOA circuit, comprising a forward-backward scan control module, an output module, an output pull-down module, a node control module, a second node signal input module, a second node signal control module, a voltage stabilizing module and a second capacitor; the forward scan of the circuit is controlled with the ninth and the tenth thin film transistors, and the signal input of the second node is controlled with the first and the eleventh thin film transistors, and the mutual control of the first node and the second node are achieved with the second, the fourth and the fifth thin film transistors, and meanwhile, as the GOA circuit applies to a display of dual side drive interlaced scan structure, the GOA circuits of the two sides can respectively receive four different clock signals to reduce the loading of the signal line of the GOA circuit.
-
公开(公告)号：US09905182B2
公开(公告)日：2018-02-27
申请号：US14915222
申请日：2016-01-05
Inventor： Juncheng Xiao , Shangcao Cao , Ronglei Dai , Yao Yan
CPC classification number: G09G3/3677 , G06F3/0416 , G09G2300/0408 , G09G2310/0251 , G09G2310/0283 , G09G2310/0286 , G09G2310/08
Abstract: A GOA driving circuit, a TFT display panel and a display device are disclosed. The GOA driving circuit includes: an input module configured for outputting first control signals in accordance with the received display scanning signals and the touch scanning signals; an output module configured for outputting the first output control signals in accordance with the first control signals and the first clock signals; a pull-down module configured for outputting pull-down signals in accordance with the first control signals, the second control signals and the low level signals; and a pull-down maintaining module configure for outputting the second output control signals in accordance with the pull-down signals, the high level signals, and the first clock signals. The DC source is adopted to charge/discharge Qn to keep Qn at a reasonable level, and the transfer capability is enhanced. In addition, the forward scanning and the backward scanning may be implemented.
-
-
-
-
-
-
-
-
-
Search Results
63
records
(took 0.029 seconds)
