公开(公告)号：US20230275038A1

公开(公告)日：2023-08-31

申请号：US18311434

申请日：2023-05-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chin-Hua WANG ,  Kuang-Chun LEE ,  Shu-Shen YEH ,  Tsung-Yen LEE ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L23/373 ,  H01L25/065 ,  H01L21/56 ,  H01L23/31 ,  H01L25/00 ,  H01L25/18

CPC分类号： H01L23/562 ,  H01L23/3736 ,  H01L25/0655 ,  H01L21/563 ,  H01L23/3128 ,  H01L25/50 ,  H01L25/18

摘要： A chip package structure is provided. The chip package structure includes a first semiconductor die bonded over an interposer substrate and a warpage release layer structure. The chip package structure also includes a first organic material layer covering an upper surface of the first semiconductor die; and a first metal layer covering an upper surface of the first organic material layer. The first metal layer has a planar shape that is the same as a planar shape of the first semiconductor die, as viewed in a top-view perspective.

公开(公告)号：US20230274950A1

公开(公告)日：2023-08-31

申请号：US18311980

申请日：2023-05-04

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng LIN ,  Shu-Shen YEH ,  Chin-Hua WANG ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L21/56 ,  H01L23/31 ,  H01L23/58 ,  H01L23/00 ,  H01L25/065 ,  H01L23/498

CPC分类号： H01L21/563 ,  H01L21/565 ,  H01L23/3142 ,  H01L23/49838 ,  H01L23/585 ,  H01L24/05 ,  H01L24/97 ,  H01L25/0657 ,  H01L2224/04105

摘要： A method for forming a semiconductor die package is provided, including disposing a first semiconductor die and a second semiconductor die over an interposer substrate, forming an underfill element over the interposer substrate to surround the first and second semiconductor dies, wherein a portion of the underfill element is between the semiconductor dies, stacking the interposer substrate over a package substrate, and installing a ring structure on the package substrate through an adhesive layer to surround the semiconductor dies. The ring structure has recessed parts recessed from its bottom surface. The recessed parts include first recessed parts arranged in at least one corner area of the ring structure and two second recessed parts arranged in two opposite side areas of the ring structure. The portion of the underfill element between the first and the second semiconductor dies is disposed between the two second recessed parts.

公开(公告)号：US20230253344A1

公开(公告)日：2023-08-10

申请号：US18305018

申请日：2023-04-21

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng LIN ,  Chien-Hung CHEN ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L25/18 ,  H01L25/00

CPC分类号： H01L23/562 ,  H01L25/18 ,  H01L25/50

摘要： A package structure is provided. The package structure includes a substrate and a chip-containing structure bonded to the substrate. The package structure also includes a warpage-control element attached to the substrate. The warpage-control element has a protruding portion extending into the substrate.

公开(公告)号：US20230207476A1

公开(公告)日：2023-06-29

申请号：US18177921

申请日：2023-03-03

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Hao TSAI ,  Techi WONG ,  Yi-Wen WU ,  Po-Yao CHUANG ,  Shin-Puu JENG

IPC分类号： H01L23/538 ,  H01L23/31 ,  H01L23/00 ,  H01L21/56

CPC分类号： H01L23/5389 ,  H01L23/5386 ,  H01L23/3128 ,  H01L24/32 ,  H01L24/16 ,  H01L21/568 ,  H01L24/92 ,  H01L24/73 ,  H01L2224/92225 ,  H01L2224/32225 ,  H01L2224/16225 ,  H01L2224/73253

摘要： A package structure is provided. The package structure includes a redistribution structure and a semiconductor chip over the redistribution structure. The package structure also includes an adhesive element over the semiconductor chip. Opposite outermost edges of the adhesive element are laterally between opposite outermost edges of the redistribution structure. The package structure further includes a protective layer laterally surrounding the semiconductor chip and the adhesive element. In addition, the package structure includes a thermal conductive element over the semiconductor chip. The thermal conductive element is surrounded by the adhesive element.

公开(公告)号：US20230069717A1

公开(公告)日：2023-03-02

申请号：US17459347

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shu-Shen YEH ,  Che-Chia YANG ,  Yu-Sheng LIN ,  Chin-Hua WANG ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/367 ,  H01L25/065 ,  H01L25/18 ,  H01L25/00 ,  H01L21/48

摘要： A chip package structure is provided. The chip package structure includes a wiring substrate. The chip package structure includes a first chip structure over the wiring substrate. The chip package structure includes a heat-spreading lid over the wiring substrate and covering the first chip structure. The heat-spreading lid includes a ring structure and a top plate. The ring structure surrounds the first chip structure. The top plate covers the ring structure and the first chip structure. The first chip structure has a first sidewall and a second sidewall opposite to the first sidewall, a first distance between the first sidewall and the ring structure is less than a second distance between the second sidewall and the ring structure, the top plate has a first opening, the first opening has a first inner wall and a second inner wall facing each other.

公开(公告)号：US20230069311A1

公开(公告)日：2023-03-02

申请号：US17459314

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Shu-Shen YEH ,  Po-Chen LAI ,  Che-Chia YANG ,  Li-Ling LIAO ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L25/065 ,  H01L23/31 ,  H01L23/498 ,  H01L21/78 ,  H01L21/56 ,  H01L21/48

摘要： A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate. The chip structure has an inclined sidewall, the inclined sidewall is at an acute angle to a vertical, the vertical is a direction perpendicular to a main surface of the chip structure, and the acute angle is in a range from about 12 degrees to about 45 degrees. The method also includes forming a protective layer to surround the chip structure.

公开(公告)号：US20230064957A1

公开(公告)日：2023-03-02

申请号：US17459215

申请日：2021-08-27

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng LIN ,  Shin-Puu JENG ,  Po-Yao LIN ,  Chin-Hua WANG ,  Shu-Shen YEH ,  Che-Chia YANG

IPC分类号： H01L23/538 ,  H01L23/13 ,  H01L21/683 ,  H01L21/48

摘要： A package structure and a formation method of a package structure are provided. The method includes forming a recess in a circuit substrate, and the recess has a first sidewall and a second sidewall. The second sidewall is between the first sidewall and a bottommost surface of the circuit substrate, and the second sidewall is steeper than the first sidewall. The method also includes forming a die package, and the die package has a semiconductor die. The method further includes bonding the die package to the circuit substrate through bonding structures such that a portion of the semiconductor die enters the recess of the circuit substrate. In addition, the method includes forming an underfill material to surround the bonding structures and to fill the recess.

公开(公告)号：US20230062783A1

公开(公告)日：2023-03-02

申请号：US17461567

申请日：2021-08-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Yu-Sheng LIN ,  Chien-Hung CHEN ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L25/18 ,  H01L25/00

摘要： A package structure and a formation method of a package structure are provided. The package structure includes a circuit substrate and a die package bonded to the circuit substrate through bonding structures. The package structure also includes a warpage-control element attached to the circuit substrate. The warpage-control element has a protruding portion extending into the circuit substrate. The warpage-control element has height larger than that of the die package.

公开(公告)号：US20230061269A1

公开(公告)日：2023-03-02

申请号：US17460705

申请日：2021-08-30

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chin-Hua WANG ,  Shu-Shen YEH ,  Po-Chen LAI ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L25/16 ,  H01L23/04 ,  H01L23/10 ,  H01L21/48

摘要： A package structure is provided. The package structure includes a first package component and a second package component. The second package component includes a substrate and an electronic component disposed on the substrate, and the first package component is mounted to the substrate. The package structure further includes a ring structure disposed on the second package component and around the first package component. The ring structure has a first foot and a second foot, the first foot and the second foot extend toward the substrate, the electronic component is covered by the ring structure and located between the first foot and the second foot, and the first package component is exposed from the ring structure.

公开(公告)号：US20220406729A1

公开(公告)日：2022-12-22

申请号：US17350293

申请日：2021-06-17

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Po-Chen LAI ,  Chin-Hua WANG ,  Ming-Chih YEW ,  Li-Ling LIAO ,  Tsung-Yen LEE ,  Po-Yao LIN ,  Shin-Puu JENG

IPC分类号： H01L23/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56

摘要： A package structure is provided. The package structure includes a redistribution structure and a first semiconductor die over the redistribution structure. The package structure also includes a wall structure laterally surrounding the first semiconductor die and the wall structure includes a plurality of partitions separated from one another. The package structure also includes an underfill material between the wall structure and the first semiconductor die. The package structure also includes a molding compound encapsulating the wall structure and the underfill material.