Semiconductor device
    32.
    发明授权

    公开(公告)号:US11081459B2

    公开(公告)日:2021-08-03

    申请号:US16594091

    申请日:2019-10-07

    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.

    Semiconductor processing station
    33.
    发明授权

    公开(公告)号:US10763140B2

    公开(公告)日:2020-09-01

    申请号:US16159709

    申请日:2018-10-14

    Abstract: A semiconductor processing station including a central transfer chamber, a load lock chamber disposed adjacent to the central transfer chamber, and a cooling stage disposed adjacent to the load lock chamber and the central transfer chamber is provided. The load lock chamber is adapted to contain a wafer carrier including a plurality of wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer of the plurality of wafers between the cooling stage and the load lock chamber.

    Semiconductor device and method of forming the same

    公开(公告)号:US10483226B2

    公开(公告)日:2019-11-19

    申请号:US15957919

    申请日:2018-04-20

    Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.

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