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31.
公开(公告)号:US11094776B2
公开(公告)日:2021-08-17
申请号:US16432625
申请日:2019-06-05
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chi-Cheng Chen , Wei-Li Huang , Chun-Yi Wu , Kuang-Yi Wu , Hon-Lin Huang , Chih-Hung Su , Chin-Yu Ku , Chen-Shien Chen
IPC: H01L21/677 , H01L49/02 , H01F41/04 , H01L23/00 , H01L21/768 , H01L23/31 , H01L23/532
Abstract: A structure and a formation method of a semiconductor device are provided. The method includes forming a passivation layer over a semiconductor substrate. The method also includes forming a magnetic element over the passivation layer. The method further includes forming an isolation layer over the magnetic element and the passivation layer. The isolation layer includes a polymer material. In addition, the method includes forming a conductive line over the isolation layer, and the conductive line extends across the magnetic element.
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公开(公告)号:US11081459B2
公开(公告)日:2021-08-03
申请号:US16594091
申请日:2019-10-07
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chin-Yu Ku , Hon-Lin Huang , Chao-Yi Wang , Chen-Shien Chen , Chien-Hung Kuo
IPC: H01L23/00
Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
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公开(公告)号:US10763140B2
公开(公告)日:2020-09-01
申请号:US16159709
申请日:2018-10-14
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chia-Wei Lu , Hon-Lin Huang , Hung-Chih Wang
IPC: B05C13/00 , H01L21/67 , C23C18/16 , B05C11/06 , H01L21/673
Abstract: A semiconductor processing station including a central transfer chamber, a load lock chamber disposed adjacent to the central transfer chamber, and a cooling stage disposed adjacent to the load lock chamber and the central transfer chamber is provided. The load lock chamber is adapted to contain a wafer carrier including a plurality of wafers. The central transfer chamber communicates between the cooling stage and the load lock chamber to transfer a wafer of the plurality of wafers between the cooling stage and the load lock chamber.
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34.
公开(公告)号:US10748810B2
公开(公告)日:2020-08-18
申请号:US15991523
申请日:2018-05-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ting-Li Yang , Wei-li Huang , Sheng-Pin Yang , Chi-Cheng Chen , Hon-Lin Huang , Chin-Yu Ku , Chen-Shien Chen
IPC: H01L21/768 , H01L23/00 , H01L23/04 , H01L23/522 , H01L49/02 , H01F41/04 , H01F17/00 , H01L23/532
Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first conductive line over a substrate. The method includes forming a first protection cap over a first portion of the first conductive line. The first protection cap and the first conductive line are made of different conductive materials. The method includes forming a first photosensitive dielectric layer over the substrate, the first conductive line, and the first protection cap. The method includes forming a first opening in the first photosensitive dielectric layer and over the first protection cap. The method includes forming a conductive via structure and a second conductive line over the first conductive line. The conductive via structure is in the first opening and over the first protection cap, and the second conductive line is over the conductive via structure and the first photosensitive dielectric layer.
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公开(公告)号:US10741477B2
公开(公告)日:2020-08-11
申请号:US15933396
申请日:2018-03-23
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Cheng-Lung Yang , Chih-Hung Su , Chen-Shien Chen , Hon-Lin Huang , Kun-Ming Tsai , Wei-Je Lin
IPC: H01L23/48 , H01L23/00 , H01L23/528 , H01L21/48
Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor devices includes a first conductive layer, an organic layer, a silicon layer, a magnetic layer and a second conductive layer. The organic layer is disposed over and exposes a portion of the first conductive layer. The silicon layer is disposed on and in contact with the organic layer. The magnetic layer is disposed over the first conductive layer. The second conductive layer is disposed over the organic layer and the magnetic layer to electrically connect the first conductive layer.
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公开(公告)号:US10483226B2
公开(公告)日:2019-11-19
申请号:US15957919
申请日:2018-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chin-Yu Ku , Hon-Lin Huang , Chao-Yi Wang , Chen-Shien Chen , Chien-Hung Kuo
IPC: H01L23/00
Abstract: A method of forming a semiconductor device is provided. A first substrate is provided with a conductive feature therein, a metal bump over the conductive feature and a passivation stack aside the metal bump. A first insulating layer is formed over the metal bump and the passivation stack. First and second patterning processes are performed to form first and second opening patterns in the first insulating layer. The metal bump is exposed by the second patterning process. A second substrate is provided with a second insulating layer thereon. The second substrate is bonded to the first substrate with the second insulating layer and the first insulating layer facing each other, so that the second insulating layer fills in the first and second opening patterns of the first insulating layer. The first insulating layer and a portion of the passivation stack are removed.
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公开(公告)号:US10319695B2
公开(公告)日:2019-06-11
申请号:US15715659
申请日:2017-09-26
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Sheng-Yu Wu , Ching-Hui Chen , Mirng-Ji Lii , Kai-Di Wu , Chien-Hung Kuo , Chao-Yi Wang , Hon-Lin Huang , Zi-Zhong Wang , Chun-Mao Chiu
IPC: H01L23/00
Abstract: A semiconductor device includes a semiconductor substrate. A pad region is disposed on the semiconductor substrate. A micro bump is disposed on the pad region. The micro bump has a first portion on the pad region and a second portion on the first portion. The first portion and the second portion have different widths. The first portion has a first width and the second portion has a second width. The first width is larger or smaller than the second width. The micro bump includes nickel and gold. The semiconductor device also includes a passivation layer overlying a portion of the pad region.
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公开(公告)号:US20190096804A1
公开(公告)日:2019-03-28
申请号:US16203632
申请日:2018-11-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hon-Lin Huang , Chen-Shien Chen , Chin-Yu Ku , Kuan-Chih Huang , Wei-Li Huang
IPC: H01L23/522 , H01L21/768 , H01L49/02 , H01L23/31
CPC classification number: H01L23/5227 , H01L21/76832 , H01L23/3171 , H01L28/10 , H01L2224/11
Abstract: Semiconductor devices and methods of forming the same are provided. One of the semiconductor devices comprises a conductive layer, a first dielectric layer disposed over the conductive layer, a magnetic layer disposed over the first dielectric layer, and a plurality of tantalum layers and a plurality of tantalum oxide layers alternately disposed between the magnetic layer and the first dielectric layer.
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公开(公告)号:US20190006455A1
公开(公告)日:2019-01-03
申请号:US15638387
申请日:2017-06-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chin-Yu Ku , Chien-Chih Chou , Chen-Shien Chen , Hon-Lin Huang , Chi-Cheng Chen , Kuang-Yi Wu
IPC: H01L49/02 , H01L23/522 , H01L23/00
Abstract: Semiconductor devices and methods of forming the same are disclosed. One of the semiconductor device includes an inductor structure, and the inductor structure is on a substrate and includes a first metal layer, a magnetic stack, a polymer layer and a second metal layer. The first metal layer is over the substrate. The magnetic stack is over the first metal layer and has a substantially zigzag shaped sidewall. The polymer layer is over the first metal layer and encapsulates the magnetic stack. The second metal layer is over the polymer layer.
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公开(公告)号:US20180301430A1
公开(公告)日:2018-10-18
申请号:US15489954
申请日:2017-04-18
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Chien-Hung Kuo , Chin-Yu Ku , Yuh-Sen Chang , Hon-Lin Huang , Sheng-Yu Wu , Ching-Hui Chen , Mirng-Ji LII
IPC: H01L23/00
CPC classification number: H01L24/14 , H01L24/03 , H01L24/06 , H01L24/11 , H01L24/13 , H01L2224/0401 , H01L2224/0603 , H01L2224/13082 , H01L2224/1403
Abstract: A semiconductor structure includes an interconnect structure, at least one first metal pad, at least one second metal pad, at least one first bump, at least one second bump, at least one photosensitive material, and a bonding layer. The first metal pad and the second metal pad are disposed on and electrically connected to the interconnect structure. The first bump is disposed on the first metal pad. The second bump is disposed on the second metal pad. The photosensitive material is disposed on the first bump. The bonding layer is in contact with the photosensitive material and the second bump. The photosensitive material is disposed between the first bump and the bonding layer.
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