Self-aligned metal compound layers for semiconductor devices

    公开(公告)号:US11139397B2

    公开(公告)日:2021-10-05

    申请号:US16572255

    申请日:2019-09-16

    Abstract: The present disclosure relates to methods for forming a semiconductor device. The method includes forming a substrate and forming first and second spacers on the substrate. The method includes depositing first and second self-assembly (SAM) layers respectively on sidewalls of the first and second spacers and depositing a layer stack on the substrate and between and in contact with the first and second SAM layers. Depositing the layer stack includes depositing a ferroelectric layer and removing the first and second SAM layers. The method further includes depositing a metal compound layer on the ferroelectric layer. Portions of the metal compound layer are deposited between the ferroelectric layer and the first or second spacers. The method also includes depositing a gate electrode on the metal compound layer and between the first and second spacers.

    Fabrication of field effect transistors with ferroelectric materials

    公开(公告)号:US11031490B2

    公开(公告)日:2021-06-08

    申请号:US16454854

    申请日:2019-06-27

    Abstract: A method of forming a semiconductor device includes forming a sacrificial layer on sidewalls of gate spacers disposed over a semiconductor layer, forming a first hafnium-containing gate dielectric layer over the semiconductor layer in a first trench disposed between the gate spacers, removing the sacrificial layer to form a second trench between the gate spacers and the first hafnium-containing gate dielectric layer, forming a second hafnium-containing gate dielectric layer over the first hafnium-containing gate dielectric layer and on the sidewalls of the gate spacers, annealing the first and the second hafnium-containing gate dielectric layers while simultaneously applying an electric field, and subsequently forming a gate electrode over the annealed first and second hafnium-containing gate dielectric layers.

    Semiconductor device and fabrication method thereof

    公开(公告)号:US11018232B2

    公开(公告)日:2021-05-25

    申请号:US16875877

    申请日:2020-05-15

    Abstract: A semiconductor device includes a semiconductor substrate, a pair of source/drain regions, and a gate stack. The pair of source/drain regions is on the semiconductor substrate. The gate stack is laterally between the source/drain regions and includes a gate dielectric layer over the semiconductor fin, a metal element-containing layer over the gate dielectric layer, and a fill metal layer over the metal element-containing layer. The metal element-containing layer has a dopant, and a concentration of the dopant in an upper portion of the metal element-containing layer is higher than a concentration of the dopant in a bottom portion of the metal element-containing layer.

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