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公开(公告)号：US20130120630A1
公开(公告)日：2013-05-16
申请号：US13658258
申请日：2012-10-23
Applicant: Samsung Electronics Co. Ltd.
Inventor： Minsu KIM , Kuntak KIM , Kiyeon PARK , Chuleun YUN , Jubeam LEE , Seyoung JANG , Hyojae CHO , Bongsu CHUN , Younghee HA
CPC classification number: G01K13/00 , H04M1/72569 , H04M2250/52 , H04N5/23241
Abstract: A temperature control system of a mobile device is provided. The system includes a memory for storing a set temperature value and a release temperature value, a temperature sensor for sensing an internal temperature of the mobile device; at least one module that emits heat, and a controller. The controller compares the output of the temperature sensor with the set temperature value in a normal mode in order to determine whether the mobile device is overheated, and controls, if the mobile device is overheated, the at least one module to operate in a heat generation suppressing mode, compares the output of the temperature sensor with the release temperature value in the heat generation suppressing mode in order to determine whether to release the heat generation suppressing mode, and executes the normal mode if the heat generation suppressing mode is released according to the comparison result.
Abstract translation: 提供了一种移动设备的温度控制系统。 该系统包括用于存储设定温度值和释放温度值的存储器，用于感测移动设备的内部温度的温度传感器; 至少一个发热的模块和一个控制器。 控制器在正常模式下将温度传感器的输出与设定温度值进行比较，以便确定移动设备是否过热，并且如果移动设备过热，则控制至少一个模块以发热 将发热抑制模式中的温度传感器的输出与释放温度值进行比较，以便确定是否释放发热抑制模式，并且如果根据产生抑制模式释放发热抑制模式，则执行正常模式 比较结果。
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32.发明申请公开(公告)号：US20220385277A1
公开(公告)日：2022-12-01
申请号：US17696086
申请日：2022-03-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungman LIM , Minsu KIM , Ahreum KIM
IPC: H03K3/037 , H03K17/687
Abstract: An integrated circuit includes a flip-flop configured to operate in synchronization with a clock signal. The flip-flop includes a multiplexer configured to output an inverted signal of a scan input signal to a first node based on a scan enable signal, or the multiplexer configured to output an inverted signal of a data input signal or a signal having a first level to a first node based on a reset input signal, a master latch configured to latch the signal output through the first node, and to output the latched signal, and a slave latch configured to latch an output signal of the master latch and to output the latched output signal of the master latch.
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公开(公告)号：US20220310036A1
公开(公告)日：2022-09-29
申请号：US17841719
申请日：2022-06-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Soohyun MOON , Kyoungmin PARK , Minsu KIM , Keehyon PARK , Dongheon SHIN , Hearyun JUNG , Dongkyoon HAN
IPC: G09G5/10
Abstract: An electronic device includes: a display device, a processor operatively connected to the display device, and a memory operatively connected to the processor, The memory stores one or more instructions that when executed, cause the processor to: determine, as a second screen code value, a code value obtained by reducing a first screen code value corresponding to a luminance value of a screen of the display device by a decrement based on the screen being maintained in a turned on state during a first specific time after a screen-off condition of the display device is satisfied, and change the luminance value of the screen to correspond to the determined second screen code value,
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Patent Agency Ranking
公开(公告)号：US20220271742A1
公开(公告)日：2022-08-25
申请号：US17564915
申请日：2021-12-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Chanhee PARK , Ahreum KIM , Minsu KIM
Abstract: A voltage level shifter cell, which is configured to convert voltage levels of input signals of multi-bits, includes: a first circuit area including a first voltage level shifter configured to convert a 1-bit first input signal from among the input signals; and a second circuit area including a second voltage level shifter configured to convert a 1-bit second input signal from among the input signals, wherein the first circuit area and the second circuit area share a first N-well to which a first power voltage is applied, and the first circuit area and the second circuit area share a second N-well to which a second power voltage is applied, wherein the first N-well is formed to extend in a first direction, and the first N-well and the second N-well are arranged to overlap in a second direction crossing the first direction.
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公开(公告)号：US20220100622A1
公开(公告)日：2022-03-31
申请号：US17245568
申请日：2021-04-30
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jooyong PARK , Minsu KIM , Daeseok BYEON , Pansuk KWAK
Abstract: A memory device includes a memory cell array including normal memory cells and redundant memory cells; first page buffers connected to the normal memory cells through first bit lines including a first bit line group and a second bit line group and arranged in a first area corresponding to the first bit lines in a line in a first direction; and second page buffers connected to the redundant memory cells through second bit lines including a third bit line group and a fourth bit line group and arranged in a second area corresponding to the second bit lines in a line in the first direction, wherein, when at least one normal memory cell connected to the first bit line group is determined as a defective cell, normal memory cells connected to the first bit line group are replaced with redundant memory cells connected to the third bit line group.
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公开(公告)号：US20210279587A1
公开(公告)日：2021-09-09
申请号：US17190832
申请日：2021-03-03
Applicant: Samsung Electronics Co., Ltd. , SNU R&DB FOUNDATION
Inventor： Bernhard EGGER , Minsu KIM , Hyemi MIN
Abstract: A method and an apparatus for generating a code for a neural network operation are disclosed. The method includes receiving information on hardware configured to perform a neural network operation of the neural network, generating, using a processor, a target mapping model mapping the neural network operation on processing elements available to perform the neural network operation based on the information and a structure of the neural network, and generating a code to configure the hardware to perform the neural network operation based on the target mapping model.
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公开(公告)号：US20210152161A1
公开(公告)日：2021-05-20
申请号：US16930658
申请日：2020-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jongwoo KIM , Minsu KIM , Yonggeol KIM , Hyun LEE , Hyunchul HWANG
Abstract: A flip-flop includes an input switching circuit configured to output an intermediate signal based on an input signal and at least one of a phase of a clock signal or a phase of an inverted clock signal, the phase of the inverted clock signal being opposite to the phase of the clock signal, and block application of a driving voltage to at least one circuit element of the input switching circuit in response to receiving a reset signal representing a reset operation of the flip-flop, and a latch circuit configured to generate an output signal based on the intermediate signal according to the at least one of the phase of the clock signal or the phase of the inverted clock signal.
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公开(公告)号：US20190220568A1
公开(公告)日：2019-07-18
申请号：US16102888
申请日：2018-08-14
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jong Kyu RYU , Minsu KIM
Abstract: A semiconductor device includes a first standard cell and a second standard cell. A single diffusion break region extending in a first direction is formed in the first standard cell, and a first edge region extending in the first direction and having a maximum cutting depth in a depth direction perpendicular to the first direction is in the first standard cell. A double diffusion break region extending in the first direction is formed in the second standard cell, and a second edge region extending in the first direction and having the maximum cutting depth in the depth direction is formed in the second standard cell.
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