公开(公告)号：US20220084943A1

公开(公告)日：2022-03-17

申请号：US17235369

申请日：2021-04-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cheoljin Cho ,  Jungmin Park ,  Hanjin Lim ,  Jaehyoung Choi

IPC: H01L23/528 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor device includes a landing pad on a substrate, a lower electrode on the landing pad, the lower electrode including an outer protective layer, a conductive layer between opposing sidewalls of the outer protective layer, and an inner protective layer between opposing sidewalls of the conductive layer, a first supporter pattern on a side surface of the lower electrode, the first supporter pattern including a supporter hole, a dielectric layer on a surface of each of the lower electrode and the first supporter pattern, and an upper electrode on the dielectric layer. The outer protective layer includes titanium oxide, the conductive layer includes titanium nitride, and the inner protective layer includes titanium silicon nitride. In a horizontal cross-sectional view, the outer protective layer has an arc shape that extends between the dielectric layer and the conductive layer.

公开(公告)号：US10930654B2

公开(公告)日：2021-02-23

申请号：US16441100

申请日：2019-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hanjin Lim ,  Kijong Park ,  Younsoo Kim

IPC: H01L27/108 ,  H01L29/417 ,  H01L49/02

Abstract: Semiconductor devices are provided. The semiconductor devices may include an active pattern on a substrate. The active pattern may include a first source/drain region and a second source/drain region. The semiconductor devices may also include a bit line electrically connected to the first source/drain region, a first connection electrode electrically connected to the second source/drain region, and a capacitor on the first connection electrode. The capacitor may include a first electrode, a second electrode, and a dielectric pattern between the first and second electrodes. A lower portion of the dielectric pattern may overlap a top surface of the first connection electrode, and the first electrode may extend on an upper portion of a sidewall of the first connection electrode.

公开(公告)号：US10892345B2

公开(公告)日：2021-01-12

申请号：US15995049

申请日：2018-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunmin Moon ,  Young-Lim Park ,  Kyuho Cho ,  Hanjin Lim

IPC: H01L29/51 ,  H01L21/762 ,  H01L29/15 ,  H01L29/06 ,  H01L27/108 ,  H01L49/02

Abstract: Disclosed is a semiconductor device including a bottom electrode, a dielectric layer, and a top electrode that are sequentially disposed on a substrate. The dielectric layer includes a hafnium oxide layer including hafnium oxide having a tetragonal crystal structure, and an oxidation seed layer including an oxidation seed material. The oxidation seed material has a lattice constant having a lattice mismatch of 6% or less with one of a horizontal lattice constant and a vertical lattice constant of the hafnium oxide having the tetragonal crystal structure.

公开(公告)号：US09685318B2

公开(公告)日：2017-06-20

申请号：US14920922

申请日：2015-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Young-Lim Park ,  Wonseok Yoo ,  Hyokyoung Kim ,  Changyup Park ,  Kongsoo Lee ,  Wook-Yeol Yi ,  Hanjin Lim

IPC: H01L21/02 ,  H01L21/311 ,  H01L27/108

CPC classification number: H01L21/0217 ,  H01L21/02247 ,  H01L27/10885

Abstract: Provided is a method of forming a semiconductor device. The method can include loading a semiconductor substrate into semiconductor equipment. A base layer can be formed on the loaded semiconductor substrate by performing a base deposition process using a base source material. A first silicon layer can be formed on the base layer to a greater thickness than the base layer by performing a first silicon deposition process using a silicon source material different from the base source material. A first nitrided silicon layer can be formed by nitriding the first silicon layer using a first nitridation process. The semiconductor substrate having the first nitrided silicon layer can be unloaded from the semiconductor equipment.

公开(公告)号：US20160035676A1

公开(公告)日：2016-02-04

申请号：US14681313

申请日：2015-04-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Hyun Im ,  Hyun Park ,  Soongun Lee ,  Chang Seok Lee ,  Sangwon Kim ,  Seongjun Park ,  Hyeon Jin Shin ,  Hanjin Lim

IPC: H01L23/532 ,  H01L23/528 ,  H01L21/768 ,  H01L21/3213 ,  H01L29/06 ,  H01L27/108 ,  H01L21/02

CPC classification number: H01L23/53276 ,  H01L21/02527 ,  H01L21/32139 ,  H01L21/768 ,  H01L21/76834 ,  H01L21/7685 ,  H01L21/76852 ,  H01L21/76885 ,  H01L23/528 ,  H01L23/53209 ,  H01L23/53214 ,  H01L23/53223 ,  H01L23/53228 ,  H01L23/53238 ,  H01L23/53257 ,  H01L23/53266 ,  H01L23/53271 ,  H01L27/10814 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10873 ,  H01L27/10885 ,  H01L27/10888 ,  H01L29/0642 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor devices may include a substrate including an active region defined by a device isolation layer, source/drain regions in the active region, word lines extending in a first direction parallel to the active region and being arranged in a second direction crossing the first direction, a bit line pattern extending in the second direction and crossing over a portion of the active region positioned between the word lines, and a graphene pattern covering at least a portion of the bit line pattern.

Abstract translation: 半导体器件可以包括：衬底，其包括由器件隔离层限定的有源区，有源区中的源极/漏极区，在与有源区平行的第一方向上延伸的并且沿与第一方向交叉的第二方向布置的字线; 在第二方向上延伸并与位于字线之间的有源区的一部分交叉的位线图形，以及覆盖位线图案的至少一部分的石墨烯图案。