METHOD FOR RAPID CHARGING AND ELECTRONIC DEVICE THEREOF
    31.
    发明申请
    METHOD FOR RAPID CHARGING AND ELECTRONIC DEVICE THEREOF 有权
    快速充电方法及其电子设备

    公开(公告)号:US20150123599A1

    公开(公告)日:2015-05-07

    申请号:US14534126

    申请日:2014-11-05

    CPC classification number: H02J7/007 H02J7/0047 H02J7/0068 H02J7/34

    Abstract: A method and an apparatus for rapid charging in an electronic device are provided. In a method for charging a battery of an electronic device, an operation environment of the electronic device is determined. A charging current corresponding to the operation environment of the electronic device is set. Battery charging is started using the set charging current. The battery is charged using a maximum allowed charging current, such that a battery charging time may be reduced.

    Abstract translation: 提供了一种用于在电子设备中快速充电的方法和装置。 在电子设备的电池充电方法中,确定电子设备的操作环境。 设置与电子设备的操作环境对应的充电电流。 使用设定的充电电流开始电池充电。 使用最大允许充电电流对电池进行充电,使得可以减少电池充电时间。

    Battery charging method and electronic device

    公开(公告)号:US11658507B2

    公开(公告)日:2023-05-23

    申请号:US16339132

    申请日:2017-09-27

    Abstract: A battery charging method and an electronic device are disclosed. The electronic device can comprise: a connection unit comprising a first terminal to which a voltage is applied by an external device, and a second terminal for transmitting/receiving data; a first charging unit for charging a battery connected to the electronic device by using the voltage applied to the first terminal; and a second charging unit for charging the battery by dropping the voltage applied to the first terminal according to a preset voltage drop rate. The first charging unit can comprise: a first switch connected to the first terminal; a communication unit for transmitting information through the second terminal; and a first control unit for acquiring first information on the battery voltage, controlling the communication unit such that the first information is transmitted to a charger connected to the connection unit, and controlling the first switch such that the voltage adjusted on the basis of the first information by the charger is supplied to the second charging unit through the first terminal.

    Electronic device and method for wired and wireless charging in electronic device

    公开(公告)号:US11626748B2

    公开(公告)日:2023-04-11

    申请号:US17675432

    申请日:2022-02-18

    Abstract: An apparatus for wired and wireless charging of an electronic device are provided. The electronic device includes a housing, a display on a surface of the housing, a battery mounted in the housing, a circuit electrically connected with the battery, a conductive pattern positioned in the housing, electrically connected with the circuit, and configured to wirelessly transmit power to an external device, a connector on another surface of the housing and electrically connected with the circuit, a memory, and a processor electrically connected with the display, the battery, the circuit, the connector, and/or the memory. The circuit is configured to electrically connect the battery with the conductive pattern to wirelessly transmit power to the external device and electrically connect the battery with the connector to transmit power to the external device by wire, simultaneously or selectively, with wirelessly transmitting power to the external device.

    Electronic device and method for wired and wireless charging in electronic device

    公开(公告)号:US11258303B2

    公开(公告)日:2022-02-22

    申请号:US16265344

    申请日:2019-02-01

    Abstract: An apparatus for wired and wireless charging of an electronic device are provided. The electronic device includes a housing, a display on a surface of the housing, a battery mounted in the housing, a circuit electrically connected with the battery, a conductive pattern positioned in the housing, electrically connected with the circuit, and configured to wirelessly transmit power to an external device, a connector on another surface of the housing and electrically connected with the circuit, a memory, and a processor electrically connected with the display, the battery, the circuit, the connector, and/or the memory. The circuit is configured to electrically connect the battery with the conductive pattern to wirelessly transmit power to the external device and electrically connect the battery with the connector to transmit power to the external device by wire, simultaneously or selectively, with wirelessly transmitting power to the external device.

    Inductor device
    36.
    发明授权

    公开(公告)号:US10593462B2

    公开(公告)日:2020-03-17

    申请号:US14928695

    申请日:2015-10-30

    Abstract: An inductor device is provided. The inductor device includes a coil unit that includes a pair of first and second coils disposed adjacent to each other and coupled to each other, a core unit that surrounds inner and outer spaces of the coil unit, and an induction unit that is disposed in the coil unit and is induced by a magnetic field generated between the first and second coils.

    Semiconductor memory devices and memory systems including the same
    38.
    发明授权
    Semiconductor memory devices and memory systems including the same 有权
    半导体存储器件和包括其的存储器系统

    公开(公告)号:US09460816B2

    公开(公告)日:2016-10-04

    申请号:US14444856

    申请日:2014-07-28

    CPC classification number: G11C29/886 G06F11/1048 G11C29/76

    Abstract: The semiconductor memory device includes a memory cell array and an error correction code (ECC) circuit. The memory cell array is divided into a first memory region and a second memory region. Each of the first and second memory regions includes a plurality of pages each page including a plurality of memory cells connected to a word line. The ECC circuit corrects single-bit errors of the first memory region using parity bits. The first memory region provides a consecutive address space to an external device by correcting the single-bit errors using the ECC circuit and the second memory region is reserved for repairing at least one of a first failed page of the first memory region or a second failed page of the second memory region.

    Abstract translation: 半导体存储器件包括存储单元阵列和纠错码(ECC)电路。 存储单元阵列被分成第一存储区和第二存储区。 第一和第二存储器区域中的每一个包括多个页面,每个页面包括连接到字线的多个存储器单元。 ECC电路使用奇偶校验位校正第一存储区域的单位错误。 第一存储器区域通过使用ECC电路校正单位错误来向外部设备提供连续的地址空间,并且第二存储器区域被保留用于修复第一存储器区域的第一故障页面或第二存储器区域中的至少一个 第二存储器区域的页面。

    Memory device, method for performing refresh operation of the memory device, and system including the same
    39.
    发明授权
    Memory device, method for performing refresh operation of the memory device, and system including the same 有权
    存储装置,用于执行存储装置的刷新操作的方法,以及包括该存储装置的系统

    公开(公告)号:US09087554B1

    公开(公告)日:2015-07-21

    申请号:US14103402

    申请日:2013-12-11

    Inventor: Chul-Woo Park

    Abstract: A method of performing a refresh operation of a memory device including a plurality of memory cells connected to a plurality of word lines. The method includes performing a table-based refresh operation on at least a first word line of the plurality of word lines in a first time period of a refresh cycle, and performing a detector-based refresh operation on at least a second word line of the plurality of word lines in a second time period of the refresh cycle. The first word line includes at least one memory cell predetermined to be a weak cell. The second word line includes at least one memory cell dynamically determined to be a weak cell.

    Abstract translation: 一种执行包括连接到多个字线的多个存储单元的存储器件的刷新操作的方法。 所述方法包括在刷新周期的第一时间段内对所述多个字线的至少第一字线执行基于表的刷新操作,以及对所述多个字线的至少第二字线执行基于检测器的刷新操作, 刷新周期的第二时间段中的多个字线。 第一字线包括预定为弱电池的至少一个存储单元。 第二字线包括动态地被确定为弱电池的至少一个存储器单元。

    Stacked memory device and method of fabricating same
    40.
    发明授权
    Stacked memory device and method of fabricating same 有权
    堆叠式存储器件及其制造方法

    公开(公告)号:US08665644B2

    公开(公告)日:2014-03-04

    申请号:US13864437

    申请日:2013-04-17

    Abstract: A stacked semiconductor memory device comprises a semiconductor substrate having a functional circuit, a plurality of memory cell array layers, and at least one connection layer. The memory cell array layers are stacked above the semiconductor substrate. The connection layers are stacked above the semiconductor substrate independent of the memory cell array layers. The connection layers electrically connect memory cell selecting lines arranged on the memory cell array layers to the functional circuit.

    Abstract translation: 叠层半导体存储器件包括具有功能电路,多个存储单元阵列层以及至少一个连接层的半导体衬底。 存储单元阵列层堆叠在半导体衬底之上。 连接层堆叠在半导体衬底之上,独立于存储单元阵列层。 连接层将布置在存储单元阵列层上的存储单元选择线电连接到功能电路。

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