公开(公告)号：US09263560B2

公开(公告)日：2016-02-16

申请号：US14273341

申请日：2014-05-08

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon Park ,  Jae Kyu Sung ,  In Hyuk Song ,  Ji Yeon Oh ,  Dong Soo Seo

IPC: H01L29/00 ,  H01L29/739 ,  H01L29/66 ,  H01L29/78 ,  H01L29/74 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/7397 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/4236 ,  H01L29/66348 ,  H01L29/66734 ,  H01L29/74 ,  H01L29/7813 ,  H01L29/7827

Abstract: A power semiconductor device may include a first conductivity type first semiconductor region; a second conductivity type second semiconductor region formed on an upper portion of the first semiconductor region; a first conductivity type third semiconductor region formed in an upper inner side of the second semiconductor region; a trench gate formed to penetrate through a portion of the first semiconductor region from the third semiconductor region; and a first conductivity type fourth semiconductor region formed below the second semiconductor region while being spaced apart from the trench gate.

Abstract translation: 功率半导体器件可以包括第一导电类型的第一半导体区域; 形成在所述第一半导体区域的上部的第二导电类型的第二半导体区域; 形成在第二半导体区域的上内侧的第一导电型第三半导体区域; 形成为从第三半导体区域穿过第一半导体区域的一部分的沟槽栅极; 以及在与所述沟槽栅极间隔开的状态下，形成在所述第二半导体区域的下方的第一导电型第四半导体区域

公开(公告)号：US09147757B2

公开(公告)日：2015-09-29

申请号：US13874038

申请日：2013-04-30

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kee Ju Um ,  Dong Soo Seo ,  Chang Su Jang ,  In Hyuk Song ,  Jaehoon Park

IPC: H01L29/74 ,  H01L29/739 ,  H01L29/66 ,  H01L29/40 ,  H01L29/06

CPC classification number: H01L29/7395 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/404 ,  H01L29/423 ,  H01L29/66333

Abstract: There is provided a power semiconductor device, including: a first conductive type drift layer, a second conductive type termination layer formed on an upper portion of an edge of the drift layer, and a high concentration first conductive type channel stop layer formed on a side surface of the edge of the drift layer.

Abstract translation: 提供了一种功率半导体器件，包括：第一导电型漂移层，形成在漂移层的边缘的上部上的第二导电型端接层和形成在侧面的高浓度第一导电型沟道阻挡层 漂移层边缘的表面。

公开(公告)号：US20150187869A1

公开(公告)日：2015-07-02

申请号：US14272009

申请日：2014-05-07

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Jae Hoon PARK ,  Kyu Hyun Mo ,  Jae Kyu Sung ,  Kee Ju Um ,  In Hyuk Song

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC classification number: H01L29/063 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/7397 ,  H01L29/74 ,  H01L29/7802 ,  H01L29/7813

Abstract: A power semiconductor device may include: a first conductivity-type first semiconductor region; a resurf region disposed in the first semiconductor region and including first conductivity-type second semiconductor regions and second conductivity-type third semiconductor regions alternately disposed in a width direction; a first conductivity-type first cover region disposed in the first semiconductor region, disposed to be contiguous with an upper surface of the resurf region, and having an impurity concentration higher than that of the first semiconductor region; a second conductivity-type fourth semiconductor region disposed above the first semiconductor region; a first conductivity-type fifth semiconductor region disposed on an inner side of an upper portion of the fourth semiconductor region; and a trench gate disposed to penetrate from the fifth semiconductor region to a portion of an upper portion of the first semiconductor region and including a gate insulating layer and a conductive material.

Abstract translation: 功率半导体器件可以包括：第一导电类型的第一半导体区域; 设置在所述第一半导体区域中并且包括在宽度方向上交替布置的第一导电类型的第二半导体区域和第二导电类型的第三半导体区域的再生区域; 设置在所述第一半导体区域中的第一导电类型的第一覆盖区域，被设置为与所述复原区域的上表面邻接，并且具有高于所述第一半导体区域的杂质浓度的杂质浓度; 设置在所述第一半导体区域上方的第二导电型第四半导体区域; 设置在第四半导体区域的上部的内侧的第一导电型第五半导体区域; 以及沟槽栅极，设置成从第五半导体区域穿透到第一半导体区域的上部的一部分，并且包括栅极绝缘层和导电材料。

公开(公告)号：US20150144992A1

公开(公告)日：2015-05-28

申请号：US14280464

申请日：2014-05-16

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Chang Su JANG ,  In Hyuk Song ,  Jae Hoon Park ,  Dong Soo Seo

IPC: H01L29/06 ,  H01L29/73

CPC classification number: H01L29/73 ,  H01L29/0615 ,  H01L29/0878 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

Abstract: A power semiconductor device may include: an active region having a current flowing through a channel formed therein at the time of a turn-on operation of the power semiconductor device; an termination region formed in the vicinity of the active region; a plurality of trenches formed in a length direction of the active region; a first conductivity type hole accumulating region formed below the channel in the active region; and a first conductivity type electric field limiting region formed in the termination region. The electric field limiting region is formed so as to at least partially cover a trench positioned at a boundary between the active region and the termination region.

Abstract translation: 功率半导体器件可以包括：在功率半导体器件的导通操作时具有流过其中形成的沟道的电流的有源区; 形成在有源区附近的端接区域; 在所述有源区的长度方向上形成的多个沟槽; 在所述有源区中形成在所述沟道下方的第一导电型孔积存区; 以及形成在终端区域中的第一导电型电场限制区域。 电场限制区域形成为至少部分地覆盖位于有源区域和端接区域之间的边界处的沟槽。

公开(公告)号：US08981423B2

公开(公告)日：2015-03-17

申请号：US13937589

申请日：2013-07-09

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Dong Soo Seo ,  Jaehoon Park ,  Kee Ju Um ,  Chang Su Jang ,  In Hyuk Song

IPC: H01L29/66 ,  H01L29/739

CPC classification number: H01L29/7395 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/513 ,  H01L29/518 ,  H01L29/66348 ,  H01L29/7397

Abstract: There is provided a power semiconductor device, including a plurality of trench gates formed to be spaced apart from each other by a predetermined distance, a current increasing part formed between the trench gates and including a first conductivity-type emitter layer and a gate oxide formed on a surface of the trench gate, and an immunity improving part formed between the trench gates and including a second conductivity-type body layer, a preventing film formed on the surface of the trench gate, and a gate oxide having a thickness less than that the gate oxide of the current increasing part.

Abstract translation: 提供了一种功率半导体器件，包括形成为彼此间隔开预定距离的多个沟槽栅极，形成在沟槽栅极之间并包括第一导电型发射极层和形成的栅极氧化物的电流增加部分 在所述沟槽栅极的表面上形成的抗扰度改善部以及形成在所述沟槽栅极之间并且包括第二导电型体层的抗扰度改善部，以及形成在所述沟槽栅极的表面上的防止膜和厚度小于所述沟槽栅极的厚度的栅极氧化物。 电流增加部分的栅极氧化物。

公开(公告)号：US20140159105A1

公开(公告)日：2014-06-12

申请号：US13831780

申请日：2013-03-15

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Kee Ju Um ,  In Hyuk Song ,  Chang Su Jang ,  Jae Hoon Park ,  Dong Soo Seo

IPC: H01L29/739

CPC classification number: H01L29/7397 ,  H01L29/1095 ,  H01L29/41741

Abstract: Disclosed herein is a power semiconductor device, including: a drift layer formed on the first surface of the semiconductor substrate, a well layer of a first conductive type, formed on the drift layer, a trench formed to reach the drift layer through the well layer, a first electrode formed in the trench, a second conductive type of second electrode region formed on the well layer, including a first region contacting the trench in a perpendicular direction and a second region spaced apart from the trench in a parallel direction and being perpendicular to the first region, a first conductive type of second electrode region formed to contact a side surface of the second conductive type of second electrode region, and a second electrode formed on the well layer and electrically connected to the second conductive type of second electrode region and the first conductive type of second electrode region.

Abstract translation: 本文公开了一种功率半导体器件，包括：形成在半导体衬底的第一表面上的漂移层，形成在漂移层上的第一导电类型的阱层，形成为通过阱层到达漂移层的沟槽 ，形成在沟槽中的第一电极，形成在阱层上的第二导电类型的第二电极区域，包括在垂直方向上接触沟槽的第一区域和在平行方向上与沟槽间隔开的第二区域，并且垂直 形成为与第二导电类型的第二电极区域的侧表面接触的第一导电类型的第二电极区域和形成在阱层上并与第二导电类型的第二电极区域电连接的第二电极 和第一导电类型的第二电极区域。