公开(公告)号：US20150002018A1

公开(公告)日：2015-01-01

申请号：US13930138

申请日：2013-06-28

Applicant: Lam Research Corporation

Inventor： Thorsten Lill ,  Harmeet Singh ,  Alex Paterson ,  Gowri Kamarthy

IPC: H01J37/32

CPC classification number: H01J37/32174 ,  H01J37/32082 ,  H01J37/321 ,  H01J37/32128 ,  H01J37/32146 ,  H01J37/32422 ,  H01J37/32706

Abstract: Systems and methods controlling ion energy within a plasma chamber are described. One of the systems includes an upper electrode coupled to a sinusoidal RF generator for receiving a sinusoidal signal and a nonsinusoidal RF generator for generating a nonsinusoidal signal. The system further includes a power amplifier coupled to the nonsinusoidal RF generator. The power amplifier is used for amplifying the nonsinusoidal signal to generate an amplified signal. The system includes a filter coupled to the power amplifier. The filter is used for filtering the amplified signal using a filtering signal to generate a filtered signal. The system includes a chuck coupled to the filter. The chuck faces at least a portion of the upper electrode and includes a lower electrode. The lower electrode is used for receiving the filtered signal to facilitate achieving ion energy at the chuck to be between a lower threshold and an upper threshold.

Abstract translation: 描述了控制等离子体室内离子能量的系统和方法。 系统中的一个包括耦合到正弦RF发生器的上电极，用于接收正弦信号，以及用于产生非正弦信号的非正弦RF发生器。 该系统还包括耦合到非正弦RF发生器的功率放大器。 功率放大器用于放大非正弦信号以产生放大信号。 该系统包括耦合到功率放大器的滤波器。 滤波器用于使用滤波信号对放大的信号进行滤波以产生滤波信号。 该系统包括联接到过滤器的卡盘。 卡盘面向上电极的至少一部分并且包括下电极。 下部电极用于接收滤波后的信号，以便于在卡盘处获得离子能量，处于较低阈值和较高阈值之间。

公开(公告)号：US20140045337A1

公开(公告)日：2014-02-13

申请号：US14056604

申请日：2013-10-17

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Keith Gaff ,  Neil Benjamin ,  Keith Comendant

IPC: H05B1/02 ,  H01L21/3065 ,  H05B3/26

CPC classification number: H01L21/67103 ,  C23C14/50 ,  C23C14/541 ,  C23C16/4586 ,  C23C16/46 ,  C23C16/509 ,  H01J37/32091 ,  H01J37/32724 ,  H01J2237/327 ,  H01J2237/332 ,  H01J2237/3321 ,  H01J2237/3323 ,  H01J2237/334 ,  H01J2237/3342 ,  H01J2237/3343 ,  H01L21/02274 ,  H01L21/0262 ,  H01L21/28556 ,  H01L21/3065 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/32136 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H05B1/0233 ,  H05B3/00 ,  H05B3/26 ,  Y10T29/49083 ,  Y10T29/49099

Abstract: An exemplary method is directed to powering heaters in a substrate support assembly on which a semiconductor substrate is supported. The support assembly has an array of heaters powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to a power supply and at least two of the heaters and each power return line is connected to at least two of the heaters, and a switching device which independently connects each one of the heaters to one of the power supply lines and one of the power return lines so as to provide time-averaged power to each of the heaters by time divisional multiplexing of switches of the switching device. The method includes supplying power to each of the heaters sequentially using a time-domain multiplexing scheme.

Abstract translation: 一种示例性的方法是针对支撑半导体衬底的衬底支撑组件中的加热器供电。 支撑组件具有由两个或更多个电源线和两个或更多个电力返回线供电的加热器阵列，其中每个电源线连接到电源，并且至少两个加热器和每个电力回路线连接到 至少两个加热器，以及开关装置，其将每个加热器独立地连接到电源线中的一个和功率返回线之一，以便通过时分复用提供每个加热器的时间平均功率 开关器件的开关。 该方法包括使用时域复用方案依次提供给每个加热器的功率。

公开(公告)号：US20140004702A1

公开(公告)日：2014-01-02

申请号：US14013447

申请日：2013-08-29

Applicant: Lam Research Corporation

Inventor： Harmeet Singh

IPC: H01L21/3065 ,  H01C17/28 ,  B29D7/01

CPC classification number: H01L21/3065 ,  B29D7/01 ,  H01C17/28 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H05B3/68 ,  H05B2203/037

Abstract: A heating plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar heater zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar heater zone includes one or more heater element made of an insulator-conductor composite. A substrate support assembly in which the heating plate is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the heating plate include bonding together ceramic having planar heater zones, power supply lines, power return lines and vias.

Abstract translation: 一种用于半导体等离子体处理设备中的基板支撑组件的加热板，包括以可伸缩复用布局布置的多个可独立控制的平面加热器区域，以及用于独立地控制和供电平面加热器区域的电子装置。 每个平面加热器区域包括由绝缘体 - 导体复合材料制成的一个或多个加热元件。 其中结合加热板的基板支撑组件包括静电夹持电极和温度控制的基板。 制造加热板的方法包括将具有平面加热区，电源线，功率返回线和通孔的陶瓷结合在一起。

公开(公告)号：US11171021B2

公开(公告)日：2021-11-09

申请号：US14943483

申请日：2015-11-17

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Thorsten Lill ,  Alex Paterson ,  Richard A. Marsh ,  Saravanapriyan Sriraman

IPC: C23C16/00 ,  H01L21/67 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/3213 ,  H01J37/32

Abstract: The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

公开(公告)号：US10403475B2

公开(公告)日：2019-09-03

申请号：US14703066

申请日：2015-05-04

Applicant: Lam Research Corporation

Inventor： David J. Cooperberg ,  Vahid Vahedi ,  Douglas Ratto ,  Harmeet Singh ,  Neil Benjamin

IPC: C23C16/00 ,  H01L21/326 ,  H01J37/32 ,  C23C16/455 ,  C23C16/507 ,  H01L21/311 ,  H01L21/3213

Abstract: A tunable multi-zone injection system for a plasma processing system for plasma processing of substrates such as semiconductor wafers. The injector can include an on-axis outlet supplying process gas at a first flow rate to a central zone and off-axis outlets supplying the same process gas at a second flow rate to an annular zone surrounding the central zone. The arrangement permits modification of gas delivery to meet the needs of a particular processing regime by allowing independent adjustment of the gas flow to multiple zones in the chamber. In addition, compared to consumable showerhead arrangements, a removably mounted gas injector can be replaced more easily and economically.

公开(公告)号：US20190139778A1

公开(公告)日：2019-05-09

申请号：US16220583

申请日：2018-12-14

Applicant: Lam Research Corporation

Inventor： Keren Jacobs Kanarik ,  Jeffrey Marks ,  Harmeet Singh ,  Samantha SiamHwa Tan ,  Alexander Kabansky ,  Wenbing Yang ,  Taeseung Kim ,  Dennis M. Hausmann ,  Thorsten Lill

IPC: H01L21/3065 ,  C23C16/455 ,  H01L21/67 ,  H01J37/32 ,  H01L21/02 ,  H01L21/683 ,  H01L21/311

CPC classification number: H01L21/30655 ,  C23C16/402 ,  C23C16/45527 ,  C23C16/45536 ,  C23C16/45544 ,  C23C16/56 ,  H01J37/32009 ,  H01J37/32449 ,  H01J2237/334 ,  H01L21/02164 ,  H01L21/02274 ,  H01L21/0228 ,  H01L21/31116 ,  H01L21/32137 ,  H01L21/67069 ,  H01L21/67207 ,  H01L21/6831 ,  H01L43/12

Abstract: Methods are provided for integrating atomic layer etch and atomic layer deposition by performing both processes in the same chamber or reactor. Methods involve sequentially alternating between atomic layer etch and atomic layer deposition processes to prevent feature degradation during etch, improve selectivity, and encapsulate sensitive layers of a semiconductor substrate.

公开(公告)号：US10236193B2

公开(公告)日：2019-03-19

申请号：US15497992

申请日：2017-04-26

Applicant: Lam Research Corporation

Inventor： Harmeet Singh ,  Keith Gaff ,  Neil Benjamin ,  Keith Comendant

IPC: H05B1/02 ,  H01L21/67 ,  H01L21/683 ,  H01J37/32 ,  C23C4/10 ,  C23C4/134 ,  C23C14/50 ,  C23C14/54 ,  C23C14/34 ,  C23C14/10 ,  C23C16/40 ,  C23C16/458 ,  C23C16/46 ,  C23C16/509

Abstract: A substrate support is provided, is configured to support a substrate in a plasma processing chamber, and includes first, second and third insulative layers, conduits and leads. The first insulative layer includes heater zones arranged in rows and columns. The second insulative layer includes conductive vias. First ends of the conductive vias are connected respectively to the heater zones. Second ends of the conductive vias are connected respectively to power supply lines. The third insulative layer includes power return lines. The conduits extend through the second insulative layer and into the third insulative layer. The leads extend through the conduits and connect to the heater zones. The heater zones are connected to the power return lines by the leads and are configured to heat corresponding portions of the substrate to provide a predetermined temperature profile across the substrate during processing of the substrate in the plasma processing chamber.

公开(公告)号：US10197908B2

公开(公告)日：2019-02-05

申请号：US15188910

申请日：2016-06-21

Applicant: Lam Research Corporation

Inventor： Saravanapriyan Sriraman ,  Richard Wise ,  Harmeet Singh ,  Alex Paterson ,  Andrew D. Bailey, III ,  Vahid Vahedi ,  Richard A. Gottscho

IPC: G06F17/50 ,  G03F1/36 ,  G03F1/70 ,  G03F1/80

Abstract: Disclosed are methods of generating a proximity-corrected design layout for photoresist to be used in an etch operation. The methods may include identifying a feature in an initial design layout, and estimating one or more quantities characteristic of an in-feature plasma flux (IFPF) within the feature during the etch operation. The methods may further include estimating a quantity characteristic of an edge placement error (EPE) of the feature by comparing the one or more quantities characteristic of the IFPF to those in a look-up table (LUT, and/or through application of a multivariate model trained on the LUT, e.g., constructed through machine learning methods (MLM)) which associates values of the quantity characteristic of EPE with values of the one or more quantities characteristics of the IFPF. Thereafter, the initial design layout may be modified based on at the determined quantity characteristic of EPE.

公开(公告)号：US20180240686A1

公开(公告)日：2018-08-23

申请号：US15954511

申请日：2018-04-16

Applicant: Lam Research Corporation

Inventor： John Patrick Holland ,  Peter L.G. Ventzek ,  Harmeet Singh ,  Richard Gottscho

IPC: H01L21/67 ,  H01J37/32 ,  H01L21/3065

CPC classification number: H01L21/67069 ,  H01J37/32082 ,  H01J37/32633 ,  H01J37/32899 ,  H01L21/3065

Abstract: A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma.

公开(公告)号：US09997333B2

公开(公告)日：2018-06-12

申请号：US15726235

申请日：2017-10-05

Applicant: Lam Research Corporation

Inventor： John C. Valcore, Jr. ,  Harmeet Singh ,  Bradford J. Lyndaker

IPC: H01J37/32 ,  H05H1/24 ,  H03L7/06 ,  H03K3/01 ,  H03L7/00 ,  H05H1/46

CPC classification number: H01J37/32146 ,  H01J37/32082 ,  H01J37/32174 ,  H01J37/32183 ,  H01J37/3244 ,  H01J37/3255 ,  H01J2237/327 ,  H03K3/01 ,  H03L7/00 ,  H03L7/06 ,  H05H2001/4682

Abstract: A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal.