Abstract:
A shift register unit, configured to generate a first gate drive signal and a second gate drive signal, which includes a first control circuit, configured to control a potential of a first node; a second control circuit, configured to control a potential of a second node; a first output circuit, configured to generate the first gate drive signal based on a first voltage signal provided by a first voltage terminal under the control of the potentials of the first and second nodes, and output the first gate drive signal through a first gate drive signal output terminal, wherein the first voltage signal provided by the first voltage terminal is a high level signal; and a second output circuit, configured to generate a second gate drive signal based on a second voltage signal provided by a second voltage terminal under the control of a potential of a control node, and output the second gate drive signal through a second gate drive signal output terminal.
Abstract:
A scan driving circuit and a driving method thereof, and a display device are disclosed. The scan driving circuit includes: a control circuit, a scanning circuit group and a first processing circuit group. The control circuit is configured to generate and output a keyword signal to the first processing circuit group, to control a scan order of respective scanning circuits in the scanning circuit group; the first processing circuit group is configured to generate a scan enable signal according to the keyword signal, and output the scan enable signal to a scanning circuit corresponding to the keyword signal in the scanning circuit group.
Abstract:
A pixel circuit includes a driving circuit, configured to drive a light-emitting element to emit light; a compensation control circuit, electrically connected to a first gate line and configured to control a control terminal of the driving circuit to be connected with a second terminal of the driving circuit under the control of a first gate drive signal provided by the first gate line; and a data writing circuit, electrically connected to a second gate line and configured to control a data voltage to be provided to a first terminal of the driving circuit under the control of a second gate drive signal provided by the second gate line. A voltage value of the first gate drive signal is substantially different from a voltage value of the second gate drive signal.
Abstract:
A display driving circuit, a driving method thereof, and a display device are provided. The display driving circuit includes: a timing controller which is configured to acquire grayscale data of subpixels in a frame of display image row by row and output the grayscale data to the grayscale controller; a grayscale controller which is configured to receive grayscale data of each subpixel in each row of subpixels, and control at least a part of the plurality of reference grayscale voltage output terminals in the grayscale controller to output reference grayscale voltages according to the grayscale data of each subpixel in each row of subpixels; a source IC which is configured to generate a grayscale voltage according to the received reference grayscale voltages and input the grayscale voltage as a data voltage to a data line.
Abstract:
A fan-out line arrangement, a display panel and a manufacture method thereof are provided. The fan-out line arrangement provided by the present disclosure includes a plurality of fan-out lines having different lengths, wherein each of the fan-out lines includes a wiring layer; a supplementary conductive film is disposed on the wiring layer of each of at least some of the fan-out lines and electrically connected to the wiring layer; and the plurality of fan-out lines have the same impedance.
Abstract:
A pixel structure, a display panel and a display device are provided. The pixel structure includes: a base substrate; a plurality of gate lines; a plurality of data lines; a plurality of pixel units, each includes a pixel electrode and a common electrode; and a common electrode line connected with the common electrode, wherein, the common electrode line includes a first part extended along the row direction and a second part extended along the column direction; the first part is electrically connected with the second part; both the first part and the second part are arranged in a same layer with the date line; and a projection of the first part on the base substrate is at least partially disposed between projections of the gate line and the pixel electrode on the base substrate.
Abstract:
The disclosure provides an array substrate, a display device and a method for manufacturing the array substrate. The array substrate includes a base substrate, a plurality of gate lines and data lines provided thereon, a first common electrode line with an extending direction that is the same as that of the gate line, and a second common electrode line with an extending direction that is the same as that of the data line. The first common electrode line and the second common electrode line are in different layers. The first common electrode line and the second common electrode line are connected in a bridged mode.
Abstract:
The present disclosure provides a display panel including a plurality of pixels, each of which includes at least one sub-pixel. Each sub-pixel includes a color reflection box and a control unit configured to control a color to be displayed by the color reflection box. The control unit is configured to, in the presence of ambient light, control a position of a light-entering surface of a shielding member in the corresponding color reflection box relative to a light-entering surface of a case in accordance with a display image at a corresponding position, so as to enable the color reflection box to display a color of the light-entering surface of the shielding member or a color of a colored material.
Abstract:
A liquid crystal display panel, a fabrication method thereof and a display device are provided. The liquid crystal display panel comprises: an opposed substrate (10) and an array substrate (20) arranged opposite to each other, and a liquid crystal layer (30) filled between the opposed substrate (10) and the array substrate (20). Alignment films (40) having opposite friction directions are provided on opposing surfaces of the opposed substrate (10) and the array substrate (20), respectively. The liquid crystal display panel has a plurality of pixel units which are arranged in array, and each of the pixel units comprises two pixel regions (A, B) along the friction direction of the alignment film. In each of the pixel units, a surface of the opposed substrate (10) facing the liquid crystal layer (30) or a surface of the array substrate (20) facing the liquid crystal layer (30) within at least one of the two pixel regions is inclined, so that a mean value of included angles between long axes of liquid crystal molecules in the liquid crystal layer within one of the two pixel regions and a horizontal plane where the opposed substrate (10) and the array substrate (20) are located and a mean value of included angles between long axes of liquid crystal molecules in the liquid crystal layer within the other of the two pixel regions and the horizontal plane where the opposed substrate (10) and the array substrate (20) are located has a same absolute value and a sum of zero.
Abstract:
An array substrate and a display device, the array substrate comprises a fan-out area (91), an edge area (93) and a display area (92) for performing display, the fan-out area (91) and the edge area (93) are connected with the display area (92) and located on two non-adjacent sides of the display area (92) respectively; a plurality of wirings (1) are arranged on the array substrate, and the wirings (1) are routed through the display area (92) and extend into the edge area (93), the input end of each wiring (1) is located in the fan-out area (91); pads (2) are configured for the wirings (1) respectively are located on the side far away from the input end of each wiring, and the pads (2) are located in the edge area (93).