公开(公告)号：US09507726B2

公开(公告)日：2016-11-29

申请号：US14262475

申请日：2014-04-25

Applicant: Apple Inc.

Inventor： Derek R. Kumar

IPC: G06T1/20 ,  G06F12/10

CPC classification number: G06F12/0804 ,  G06F12/1009 ,  G06F12/1045 ,  G06F2212/1041 ,  G06F2212/455 ,  G06F2212/657 ,  G06F2212/68

Abstract: A method and apparatus of a device that manages virtual memory for a graphics processing unit is described. In an exemplary embodiment, the device manages a graphics processing unit working set of pages. In this embodiment, the device determines the set of pages of the device to be analyzed, where the device includes a central processing unit and the graphics processing unit. The device additionally classifies the set of pages based on a graphics processing unit activity associated with the set of pages and evicts a page of the set of pages based on the classifying.

Abstract translation: 描述了管理图形处理单元的虚拟存储器的设备的方法和装置。 在示例性实施例中，设备管理图形处理单元工作页面集合。 在本实施例中，设备确定要分析的设备的页面集合，其中设备包括中央处理单元和图形处理单元。 该设备还基于与该组页面相关联的图形处理单元活动来对页面集进行分类，并且基于分类来逐出该页面页面。

公开(公告)号：US09208113B2

公开(公告)日：2015-12-08

申请号：US13741811

申请日：2013-01-15

Applicant: Apple Inc.

Inventor： Derek R. Kumar ,  Joshua Phillips de Cesare

IPC: G06F13/24

CPC classification number: G06F13/24 ,  G06F1/3293 ,  G06F9/4418 ,  Y02D10/14

Abstract: A data processing system includes, in one embodiment, at least a first processor and a second processor and an interrupt controller, and the system provides a deferred inter-processor interrupt (IPI) that can be used to wake up the second processor from a low power sleep state. The deferred IPI is, in one embodiment, delayed by a timer in the interrupt controller, and the deferred IPI can be cancelled by the first processor if the first processor becomes available to execute a thread that was made runnable by an interrupt which triggered the deferred IPI.

Abstract translation: 在一个实施例中，数据处理系统包括至少第一处理器和第二处理器以及中断控制器，并且系统提供延迟的处理器间中断（IPI），其可用于将第二处理器从低 电力睡眠状态。 在一个实施例中，延迟IPI在中断控制器中被定时器延迟，并且如果第一处理器变得可用于执行由可触发延迟的中断而导致的线程可用的线程可以被第一处理器取消延迟IPI IPI。

公开(公告)号：US20150348226A1

公开(公告)日：2015-12-03

申请号：US14503311

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Umesh Suresh Vaishampayan ,  Derek R. Kumar ,  Cecile Marie Foret ,  Anthony Graham Sumpter ,  Harshavardhan P. Gopalakrishnan ,  William E. Damon, III

IPC: G06T1/20

CPC classification number: G06T1/20 ,  G06F1/206 ,  G06F9/4893 ,  G06T2200/28 ,  G09G5/363 ,  G09G2320/041 ,  G09G2330/021 ,  Y02D10/16

Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling graphics processing unit operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilizes a graphics processing unit of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first GPU utilization for the low priority process and maintains a second GPU utilization for the high priority process. The device further executes the low priority process using the first GPU utilization with the GPU and executes the high priority process using the second GPU utilization with the GPU.

Abstract translation: 描述了通过选择性地节流设备的图形处理单元操作来管理设备的热轮廓的设备的方法和装置。 在示例性实施例中，设备监视设备的热剖面，其中设备执行利用设备的图形处理单元的多个处理。 另外，多个处理包括高优先级处理和低优先级处理。 如果设备的热分布超过热阈值，则设备会降低低优先级进程的第一GPU利用率，并为高优先级进程维护第二GPU利用率。 该设备还使用GPU的第一GPU利用率执行低优先级进程，并且使用与GPU的第二GPU利用率执行高优先级进程。

公开(公告)号：US20150347330A1

公开(公告)日：2015-12-03

申请号：US14503312

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Umesh Suresh Vaishampayan ,  Derek R. Kumar ,  Christopher John Sarcone ,  Russell Alexader Blaine ,  Tejas Arun Bahulkar ,  Shachar Katz ,  Joseph Sokol, JR. ,  Matthew John Byom

IPC: G06F13/26 ,  G05D23/19 ,  G06F13/10

CPC classification number: G06F13/26 ,  G05D23/1917 ,  G06F1/206 ,  G06F13/102 ,  Y02D10/14 ,  Y02D10/16

Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling input/output operations of the device is described. In an exemplary embodiment, the device monitors the thermal profile of the device, where the device executes a plurality of processes that utilize storage of the device. In addition, the plurality of processes include a high priority process and a low priority process. If the thermal profile of the device exceeds a thermal threshold, the device decreases a first bandwidth range for the low priority process and maintains a second bandwidth range for the high priority process. The device further processes a storage request of the low priority process using the first bandwidth range and processing a storage request of the high priority process using the second bandwidth range.

Abstract translation: 描述了通过选择性地节流设备的输入/输出操作来管理设备的热轮廓的设备的方法和装置。 在示例性实施例中，设备监视设备的热分布，其中设备执行利用设备的存储的多个进程。 另外，多个处理包括高优先级处理和低优先级处理。 如果设备的热分布超过热阈值，则设备会降低低优先级进程的第一带宽范围，并为高优先级进程维护第二带宽范围。 该设备还使用第一带宽范围来处理低优先级进程的存储请求，并使用第二带宽范围来处理高优先级进程的存储请求。

公开(公告)号：US20150346800A1

公开(公告)日：2015-12-03

申请号：US14503321

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Derek R. Kumar

IPC: G06F1/32

CPC classification number: G06F1/206 ,  G06F1/3206 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/329 ,  G06F1/3296 ,  G06F9/4893 ,  Y02D10/126 ,  Y02D10/16 ,  Y02D10/171 ,  Y02D10/24

Abstract: A method and apparatus of a device that manages a thermal profile of a device by selectively throttling central processing unit operations of the device is described. The device manages a thermal profile of the device by adjusting a throttling a central processing unit execution of a historically high energy consuming task. In this embodiment, the device monitors thermal level of the thermal profile of the device, the device is executing a plurality of tasks that utilize a plurality of processing cores of the device. If the thermal level of the device exceeds a thermal threshold, the device identifies one of the plurality tasks as a historically high energy consuming task, and throttles this historically high energy consuming task by setting a force idle execution time for the historically high energy consuming task. The device further executes the plurality of tasks.

Abstract translation: 描述了通过选择性地节流设备的中央处理单元操作来管理设备的热分布的设备的方法和设备。 该装置通过调节节制中央处理单元执行历史上高能耗的任务来管理设备的热分布。 在该实施例中，设备监视设备的热轮廓的热水平，设备正在执行利用设备的多个处理核心的多个任务。 如果设备的热水平超过热阈值，则设备将多个任务中的一个识别为历史上高能耗的任务，并且通过为历史上高能量消耗任务设置力空闲执行时间来节制这个历史上高能耗的任务 。 该装置还执行多个任务。

公开(公告)号：US20140344820A1

公开(公告)日：2014-11-20

申请号：US13895264

申请日：2013-05-15

Applicant: Apple, Inc.

Inventor： Derek R. Kumar

IPC: G06F9/50

CPC classification number: G06F9/4843 ,  G06F9/4812 ,  G06F13/24 ,  G06F13/26 ,  Y02D10/14 ,  Y02D10/24

Abstract: A method and apparatus of a device that rate-limits the execution of a timer is described. The device receives a timer that includes an initial execution timer and a timer priority. If the timer priority is low, the device rate-limits the execution of the timer based on a suppression period associated with the timer priority. In order to rate-limit the execution of the timer, the device determines the suppression period based on the timer priority and schedules the timer to execute at the end of the suppression period. The device further schedules the timer to execute at the initial exertion time when the timer priority is high.

Abstract translation: 描述限速定时器执行的装置的方法和装置。 设备接收包括初始执行定时器和定时器优先级的定时器。 如果定时器优先级低，则设备速率 - 基于与定时器优先级相关联的抑制周期来限制定时器的执行。 为了限制定时器的执行，设备基于定时器优先级确定抑制周期，并且在抑制周期结束时调度定时器执行。 当定时器优先级高时，设备进一步调度定时器在初始运行时执行。

公开(公告)号：US20140201411A1

公开(公告)日：2014-07-17

申请号：US13741811

申请日：2013-01-15

Applicant: APPLE INC.

Inventor： Derek R. Kumar ,  Joshua Phillips de Cesare

IPC: G06F13/24

CPC classification number: G06F13/24 ,  G06F1/3293 ,  G06F9/4418 ,  Y02D10/14

Abstract: A data processing system includes, in one embodiment, at least a first processor and a second processor and an interrupt controller, and the system provides a deferred inter-processor interrupt (IPI) that can be used to wake up the second processor from a low power sleep state. The deferred IPI is, in one embodiment, delayed by a timer in the interrupt controller, and the deferred IPI can be cancelled by the first processor if the first processor becomes available to execute a thread that was made runnable by an interrupt which triggered the deferred IPI.

Abstract translation: 在一个实施例中，数据处理系统包括至少第一处理器和第二处理器以及中断控制器，并且系统提供延迟的处理器间中断（IPI），其可用于将第二处理器从低 电力睡眠状态。 在一个实施例中，延迟IPI在中断控制器中被定时器延迟，并且如果第一处理器变得可用于执行由可触发延迟的中断而导致的线程可用的线程可以被第一处理器取消延迟IPI IPI。