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    METHOD OF FORMING OPTICAL SENSOR
    32.
    发明申请
    METHOD OF FORMING OPTICAL SENSOR 有权
    形成光传感器的方法

    公开(公告)号：US20100330735A1

    公开(公告)日：2010-12-30

    申请号：US12874203

    申请日：2010-09-01

    Applicant: An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

    Inventor： An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

    IPC: H01L31/18

    CPC classification number: H01L31/0384 ,  H01L27/14667 ,  H01L27/14692 ,  H01L31/03921 ,  Y02E10/50

    Abstract: A method of forming an optical sensor includes the following steps. A substrate is provided, and a read-out device is formed on the substrate. a first electrode electrically connected to the read-out device is formed on the substrate. a photosensitive silicon-rich dielectric layer is formed on the first electrode, wherein the photosensitive silicon-rich dielectric layer comprises a plurality of nanocrystalline silicon crystals. A second electrode is formed on the photosensitive silicon-rich dielectric layer.

    Abstract translation: 形成光学传感器的方法包括以下步骤。 提供基板，并且在基板上形成读出装置。 电连接到读出装置的第一电极形成在基板上。 在第一电极上形成感光性富硅介电层，其中感光性富硅介电层包含多个纳米晶体硅晶体。 第二电极形成在感光富硅电介质层上。

    METHOD FOR FORMING PIXEL STRUCTURE OF TRANSFLECTIVE LIQUID CRYSTAL DISPLAY DEVICE
    34.
    发明申请
    METHOD FOR FORMING PIXEL STRUCTURE OF TRANSFLECTIVE LIQUID CRYSTAL DISPLAY DEVICE 有权
    用于形成透射液晶显示装置的像素结构的方法

    公开(公告)号：US20100112737A1

    公开(公告)日：2010-05-06

    申请号：US12416934

    申请日：2009-04-02

    Applicant: Yu-Cheng Chen ,  Chen-Yueh Li ,  Ching-Sang Chuang ,  Kun-Chih Lin

    Inventor： Yu-Cheng Chen ,  Chen-Yueh Li ,  Ching-Sang Chuang ,  Kun-Chih Lin

    IPC: H01L21/3115

    CPC classification number: G02F1/133555 ,  G02F2001/136231

    Abstract: A forming method of the present invention includes forming a first patterned conductive layer, which includes a transparent conductive layer and a metal layer stacked together on a substrate, where the first patterned conductive layer functions as gate lines, gate electrodes, common lines and predetermined transparent pixel electrode structures; and forming a second patterned conductive layer on the substrate. The second patterned conductive layer includes data lines and reflective pixel electrodes, and be directly connected to doping regions, such as source regions/drain regions. According to the forming method of the present invention, pixel structures of a transflective liquid crystal display device can be formed through five mask processes. Therefore, the manufacturing process of the transflective liquid crystal display device is effectively simplified, so the product yield is improved and the cost can be reduced.

    Abstract translation: 本发明的形成方法包括形成第一图案化导电层，其包括在基板上堆叠在一起的透明导电层和金属层，其中第一图案化导电层用作栅极线，栅电极，共同线和预定透明 像素电极结构; 以及在所述衬底上形成第二图案化导电层。 第二图案化导电层包括数据线和反射像素电极，并且直接连接到诸如源极区/漏极区的掺杂区。 根据本发明的形成方法，可以通过五个掩模工艺形成半透射型液晶显示装置的像素结构。 因此，有效地简化了半透射型液晶显示装置的制造工艺，从而提高了产品成品率，降低了成本。

    THIN FILM TRANSISTOR SUBSTRATE AND THIN FILM TRANSISTOR OF DISPLAY PANEL AND METHOD OF MAKING THE SAME
    35.
    发明申请
    THIN FILM TRANSISTOR SUBSTRATE AND THIN FILM TRANSISTOR OF DISPLAY PANEL AND METHOD OF MAKING THE SAME 审中-公开
    显示面板的薄膜晶体管衬底和薄膜晶体管及其制造方法

    公开(公告)号：US20100012944A1

    公开(公告)日：2010-01-21

    申请号：US12400768

    申请日：2009-03-09

    Applicant: An-Thung Cho ,  Chin-Wei Hu ,  Ming-Wei Sun ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

    Inventor： An-Thung Cho ,  Chin-Wei Hu ,  Ming-Wei Sun ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Kun-Chih Lin

    IPC: H01L29/04 ,  H01L21/84

    CPC classification number: H01L29/78633 ,  H01L29/78675

    Abstract: A thin film transistor (TFT) formed on a transparent substrate is provided. The thin film transistor includes a patterned semiconductor layer, a gate insulating layer disposed on the patterned semiconductor layer, a gate electrode disposed on the gate insulating layer, and a patterned light-absorbing layer. The patterned semiconductor layer includes a channel region, and a source region and a drain region disposed on two opposite sides of the channel region in the pattern semiconductor layer. The patterned light-absorbing layer is disposed between the transparent substrate and the patterned semiconductor layer.

    Abstract translation: 提供了形成在透明基板上的薄膜晶体管（TFT）。 薄膜晶体管包括图案化半导体层，设置在图案化半导体层上的栅极绝缘层，设置在栅极绝缘层上的栅电极和图案化的光吸收层。 图案化的半导体层包括沟道区，以及设置在图案半导体层中的沟道区的两个相对侧上的源极区和漏极区。 图案化的光吸收层设置在透明基板和图案化的半导体层之间。

    BUFFER LAYER FOR PROMOTING ELECTRON MOBILITY AND THIN FILM TRANSISTOR HAVING THE SAME
    36.
    发明申请
    BUFFER LAYER FOR PROMOTING ELECTRON MOBILITY AND THIN FILM TRANSISTOR HAVING THE SAME 有权
    用于促进电子移动的缓冲层和具有该电子传感器的薄膜晶体管

    公开(公告)号：US20090321744A1

    公开(公告)日：2009-12-31

    申请号：US12557131

    申请日：2009-09-10

    Applicant: Long-Sheng LIAO ,  Kun-Chih LIN ,  Chia-Tien PENG

    Inventor： Long-Sheng LIAO ,  Kun-Chih LIN ,  Chia-Tien PENG

    IPC: H01L29/786

    CPC classification number: H01L21/02686 ,  H01L21/02532 ,  H01L21/2026 ,  H01L21/2205 ,  H01L21/268 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78675

    Abstract: A buffer layer for promoting electron mobility. The buffer layer comprises amorphous silicon layer (a-Si) and an oxide-containing layer. The a-Si has high enough density that the particles in the substrate are prevented by the a-Si buffer layer from diffusing into the active layer. As well, the buffer, having thermal conductivity, provides a good path for thermal diffusion during the amorphous active layer's recrystallization by excimer laser annealing (ELA). Thus, the uniformity of the grain size of the crystallized silicon is improved, and electron mobility of the TFT is enhanced.

    Abstract translation: 用于促进电子迁移率的缓冲层。 缓冲层包括非晶硅层（a-Si）和含氧化物层。 a-Si具有足够高的密度，通过a-Si缓冲层防止衬底中的颗粒扩散到有源层中。 同样，具有导热性的缓冲器为通过受激准分子激光退火（ELA）的无定形有源层重结晶期间的热扩散提供了良好的途径。 因此，结晶硅的晶粒尺寸的均匀性提高，TFT的电子迁移率提高。

    THIN FILM TRANSISTOR
    37.
    发明申请
    THIN FILM TRANSISTOR 审中-公开
    薄膜晶体管

    公开(公告)号：US20090321742A1

    公开(公告)日：2009-12-31

    申请号：US12272813

    申请日：2008-11-18

    Applicant: Yuan-Jun Hsu ,  Ching-Chieh Shih ,  Kun-Chih Lin

    Inventor： Yuan-Jun Hsu ,  Ching-Chieh Shih ,  Kun-Chih Lin

    IPC: H01L29/04

    CPC classification number: H01L29/78645 ,  H01L29/78621 ,  H01L29/78696

    Abstract: A thin film transistor (TFT) including a substrate, a buffer layer, a patterned poly-silicon layer, a gate dielectric layer, and a number of gate electrodes is provided. The patterned poly-silicon layer is disposed on the buffer layer and the substrate. The patterned poly-silicon layer includes a number of channel regions, at least one heavily doped region, two lightly doped regions, a source region, and a drain region. The heavily doped region connects two adjacent channel regions. The source region connects one of the two outmost channel regions through one of the lightly doped regions. The drain region connects the other outmost channel region through the other lightly doped region. The gate dielectric layer covers the patterned poly-silicon layer. The gate electrodes are disposed on the gate dielectric layer and electrically connected to one another. Each gate is disposed above each channel region and a part of the heavily doped region.

    Abstract translation: 提供了包括衬底，缓冲层，图案化多晶硅层，栅介质层和多个栅电极的薄膜晶体管（TFT）。 图案化的多晶硅层设置在缓冲层和衬底上。 图案化多晶硅层包括多个沟道区，至少一个重掺杂区，两个轻掺杂区，源极区和漏极区。 重掺杂区域连接两个相邻的沟道区域。 源极区域通过轻掺杂区域中的一个连接两个最外面的沟道区域中的一个。 漏极区域通过另一个轻掺杂区域连接另一个最外面的沟道区域。 栅介质层覆盖图案化的多晶硅层。 栅电极设置在栅介质层上并彼此电连接。 每个栅极设置在每个沟道区上方和重掺杂区的一部分之上。

    Photo detector and method for forming thereof
    38.
    发明授权
    Photo detector and method for forming thereof 有权
    光电检测器及其形成方法

    公开(公告)号：US07595541B2

    公开(公告)日：2009-09-29

    申请号：US11776559

    申请日：2007-07-12

    Applicant: Chien-Sen Weng ,  Yi-Wei Chen ,  Chih-Wei Chao ,  Kun-Chih Lin

    Inventor： Chien-Sen Weng ,  Yi-Wei Chen ,  Chih-Wei Chao ,  Kun-Chih Lin

    IPC: H01L31/075

    CPC classification number: H01L31/035272 ,  G02F1/1362 ,  H01L31/028 ,  H01L31/105 ,  H01L31/18

    Abstract: A photo detector is disclosed. The photo detector has a substrate, a semiconductor layer disposed on the substrate, an insulating layer covered on the semiconductor layer, an interlayer dielectric layer covered on the insulating layer, and two electrodes formed on a portion of the interlayer dielectric layer. The semiconductor layer has a first doping region, a second doping region, and an intrinsic region located between the first doping region and the second doping region. The interlayer dielectric layer has at least three holes to expose a portion of the insulating layer, a portion of the first doping region, and the second doping region. The electrodes are connected to the first doping region and the second doping region through two of the holes.

    Abstract translation: 公开了一种光电检测器。 光检测器具有基板，设置在基板上的半导体层，覆盖在半导体层上的绝缘层，覆盖在绝缘层上的层间电介质层，以及形成在层间电介质层的一部分上的两个电极。 半导体层具有第一掺杂区域，第二掺杂区域和位于第一掺杂区域和第二掺杂区域之间的本征区域。 层间绝缘层具有至少三个孔以暴露绝缘层的一部分，第一掺杂区的一部分和第二掺杂区。 电极通过两个孔连接到第一掺杂区和第二掺杂区。

    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME
    40.
    发明申请
    THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD FOR FABRICATING THE SAME 有权
    薄膜晶体管阵列基板及其制造方法

    公开(公告)号：US20100012937A1

    公开(公告)日：2010-01-21

    申请号：US12269041

    申请日：2008-11-12

    Applicant: Ming-Hsien Lee ,  Ching-Chieh Shih ,  An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

    Inventor： Ming-Hsien Lee ,  Ching-Chieh Shih ,  An-Thung Cho ,  Chia-Tien Peng ,  Kun-Chih Lin

    IPC: H01L29/04 ,  H01L31/18

    CPC classification number: H01L27/14687 ,  G02F2001/13312 ,  G02F2201/58 ,  G06F3/0412 ,  G06F3/042 ,  H01L27/1214 ,  H01L27/14632

    Abstract: A method for fabricating a TFT array substrate including the following steps is provided. A substrate having a pixel region and a photosensitive region is provided. A first patterned conductive layer is formed on the substrate, wherein the first patterned conductive layer includes a gate electrode disposed in the pixel region and a first electrode disposed in the photosensitive region, and a photosensitive dielectric layer is formed on the first electrode. A gate insulation layer is formed to cover the gate electrode, the photosensitive dielectric layer and the first electrode. A patterned semiconductor layer is formed on the gate insulation layer above the gate electrode. A source electrode and a drain electrode are formed on the patterned semiconductor layer at two sides of the gate electrode, wherein the gate electrode, the source electrode, and the drain electrode constitute a TFT. A second electrode is formed on the photosensitive dielectric layer.

    Abstract translation: 提供了一种制造包括以下步骤的TFT阵列基板的方法。 提供具有像素区域和感光区域的基板。 第一图案化导电层形成在基板上，其中第一图案化导电层包括设置在像素区域中的栅极电极和设置在感光区域中的第一电极，并且在第一电极上形成光敏介电层。 形成栅极绝缘层以覆盖栅电极，光敏介电层和第一电极。 在栅极电极上方的栅极绝缘层上形成有图案化的半导体层。 源电极和漏电极形成在栅电极两侧的图案化半导体层上，其中栅电极，源电极和漏电极构成TFT。 在感光介电层上形成第二电极。

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