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101 条记录 (耗时 0.04 秒)

    Fully integrated switching and routing in a security device
    2.
    发明授权
    Fully integrated switching and routing in a security device 有权
    在安全设备中完全集成的交换和路由

    公开(公告)号：US09021547B1

    公开(公告)日：2015-04-28

    申请号：US13333439

    申请日：2011-12-21

    申请人： Tsai-Zong Lin ,  Chih-Wei Chao ,  Jin Shang ,  Dongyi Jiang ,  Anchung Chung

    发明人： Tsai-Zong Lin ,  Chih-Wei Chao ,  Jin Shang ,  Dongyi Jiang ,  Anchung Chung

    IPC分类号： G06F17/00 ,  G06F7/04 ,  H04L29/06

    CPC分类号： H04L63/20 ,  H04L63/0227 ,  H04L63/164 ,  H04L63/166

    摘要： This disclosure is directed toward an integrated switching and routing security device that provides zone-based security directly between layer two (L2) interfaces of L2 bridge domains and/or layer three (L3) interfaces of L3 routing instances within the security device. The integrated switching and routing security device supports both switching and routing functionalities for packets on L2 and L3 interfaces, and supports security within and between L2 bridge domains and L3 routing instances. The integrated switching and routing security device configures L2 security zones for one or more L2 interfaces and configures L3 security zones for one or more L3 interfaces. The integrated switching and routing security device then applies security policies to incoming packets according to the L2 security zones and/or the L3 security zones associated with the incoming interface and an outgoing interface for the packets to provide end-to-end security within the security device.

    摘要翻译： 本公开涉及集成的交换和路由安全设备，其直接在L2网桥域的第二层（L2）接口和/或L3路由实例的第三层（L3）接口之间提供基于区域的安全性。 集成交换和路由安全设备支持L2和L3接口上的数据包的交换和路由功能，并支持L2桥接域和L3路由实例之间的安全性。 集成交换路由安全设备为一个或多个L2接口配置L2安全区域，并为一个或多个L3接口配置L3安全区域。 集成交换和路由安全设备然后根据与入局接口相关联的L2安全区域和/或L3安全区域对传入的分组应用安全策略，以及用于分组的输出接口，以提供安全性内的端到端安全性 设备。

    Sequencing packets from multiple threads
    3.
    发明授权
    Sequencing packets from multiple threads 有权
    对多个线程的数据包进行排序

    公开(公告)号：US08379647B1

    公开(公告)日：2013-02-19

    申请号：US11877146

    申请日：2007-10-23

    申请人： Chih-Wei Chao ,  Dongyi Jiang ,  Rakesh Gopala Krishnan Nair ,  Jiaxiang Su

    发明人： Chih-Wei Chao ,  Dongyi Jiang ,  Rakesh Gopala Krishnan Nair ,  Jiaxiang Su

    IPC分类号： H04L12/28 ,  H04L12/56

    CPC分类号： H04L47/34 ,  H04L45/74

    摘要： A device may reserve a slot for a received packet in a packet ordering queue (POQ), convey the packet to one of a plurality of threads for processing, obtain the packet from the one of the plurality of threads after the packet has been processed, organize the packet in the POQ in accordance with a position of the reserved slot, and release the packet from the POQ if the reserved slot is a head of the POQ.

    摘要翻译： 设备可以在分组排序队列（POQ）中为接收到的分组预留时隙，将分组传送到多个线程中的一个进行处理，在分组被处理之后从多个线程中的一个线程获得分组， 根据保留时隙的位置在POQ中组织分组，如果保留的时隙是POQ的头，则从POQ释放分组。

    Light emitting diode
    4.
    发明授权
    Light emitting diode 有权
    发光二极管

    公开(公告)号：US08373179B2

    公开(公告)日：2013-02-12

    申请号：US13159430

    申请日：2011-06-14

    申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    IPC分类号： H01L33/00

    CPC分类号： H01L33/145 ,  H01L33/387

    摘要： A LED chip including a substrate, a semiconductor device layer, a current blocking layer, a current spread layer, a first electrode and a second electrode is provided. The semiconductor device layer is disposed on the substrate. The current blocking layer is disposed on a part of the semiconductor device layer and includes a current blocking segment and a current distribution adjusting segment. The current spread layer is disposed on a part of the semiconductor device layer and covers the current blocking layer. The first electrode is disposed on the current spread layer, wherein a part of the current blocking segment is overlapped with the first electrode. Contours of the current blocking segment and the first electrode are similar figures. Contour of the first electrode and is within contour of the current blocking segment. The current distribution adjusting segment is not overlapped with the first electrode.

    摘要翻译： 提供了包括衬底，半导体器件层，电流阻挡层，电流扩散层，第一电极和第二电极的LED芯片。 半导体器件层设置在基板上。 电流阻挡层设置在半导体器件层的一部分上，并且包括电流阻挡段和电流分布调节段。 电流扩展层设置在半导体器件层的一部分上并覆盖电流阻挡层。 第一电极设置在电流扩展层上，其中电流阻挡段的一部分与第一电极重叠。 当前阻挡段和第一电极的轮廓是相似的图。 第一个电极的等高线并且在当前阻挡段的轮廓内。 电流分布调节段不与第一电极重叠。

    Fabricating method of light emitting diode chip
    5.
    发明授权
    Fabricating method of light emitting diode chip 有权
    发光二极管芯片的制造方法

    公开(公告)号：US08329487B2

    公开(公告)日：2012-12-11

    申请号：US12916642

    申请日：2010-11-01

    申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    IPC分类号： H01L33/02

    CPC分类号： H01L33/20 ,  H01L33/38 ,  H01L33/46

    摘要： In a fabricating method of an LED, a first-type doped semiconductor material layer, a light emitting material layer, and a second-type doped semiconductor material layer are sequentially formed on a substrate. The first-type and second-type doped semiconductor material layers and the light emitting material layer are patterned to form a first-type doped semiconductor layer, an active layer, and a second-type doped semiconductor layer. The active layer is disposed on a portion of the first-type doped semiconductor layer. The second-type doped semiconductor layer is disposed on the active layer and has a first top surface. A wall structure is formed on the first-type doped semiconductor layer that is not covered by the active layer, and the wall structure surrounds the active layer and has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Electrodes are formed on the first-type and second-type doped semiconductor layers.

    摘要翻译： 在LED的制造方法中，在衬底上依次形成第一掺杂半导体材料层，发光材料层和第二掺杂半导体材料层。 图案化第一类型和第二类型掺杂半导体材料层和发光材料层以形成第一掺杂半导体层，有源层和第二掺杂半导体层。 有源层设置在第一掺杂半导体层的一部分上。 第二掺杂半导体层设置在有源层上并具有第一顶表面。 在第一型掺杂半导体层上形成壁结构，其不被有源层覆盖，并且壁结构围绕有源层，并且具有比第二类型掺杂半导体层的第一顶表面高的第二顶表面 。 电极形成在第一和第二掺杂半导体层上。

    Light emitting diode chip
    8.
    发明授权
    Light emitting diode chip 有权
    发光二极管芯片

    公开(公告)号：US08008686B2

    公开(公告)日：2011-08-30

    申请号：US12204815

    申请日：2008-09-05

    申请人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    发明人： Kuo-Lung Fang ,  Chien-Sen Weng ,  Chih-Wei Chao

    IPC分类号： H01L33/00

    CPC分类号： H01L33/20 ,  H01L33/38 ,  H01L33/46

    摘要： An LED chip includes a substrate, a semiconductor device layer, a wall structure, and a number of electrodes. The semiconductor device layer is disposed on the substrate and includes a first-type doped semiconductor layer disposed on the substrate, an active layer disposed on a portion of the first-type doped semiconductor layer, and a second-type doped semiconductor layer disposed on the active layer and having a first top surface. The wall structure is disposed on the first-type doped semiconductor layer that is not covered by the active layer and surrounds the active layer. Besides, the wall structure has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Additionally, the electrodes are disposed on and electrically connected with the first-type doped semiconductor layer and the second-type doped semiconductor layer.

    摘要翻译： LED芯片包括基板，半导体器件层，壁结构和多个电极。 半导体器件层设置在衬底上，并且包括设置在衬底上的第一掺杂半导体层，设置在第一掺杂半导体层的一部分上的有源层和设置在第一掺杂半导体层上的第二掺杂半导体层 活性层并具有第一顶表面。 壁结构设置在第一型掺杂半导体层上，未被有源层覆盖并包围有源层。 此外，壁结构具有比第二类型掺杂半导体层的第一顶表面高的第二顶表面。 此外，电极设置在第一掺杂半导体层和第二掺杂半导体层上并与之电连接。

    METHOD OF FABRICATING PHOTO SENSOR
    9.
    发明申请
    METHOD OF FABRICATING PHOTO SENSOR 有权
    制作照片传感器的方法

    公开(公告)号：US20110165727A1

    公开(公告)日：2011-07-07

    申请号：US13045512

    申请日：2011-03-10

    申请人： Chien-Sen Weng ,  Chih-Wei Chao ,  Chrong-Jung Lin ,  Ya-Chin King

    发明人： Chien-Sen Weng ,  Chih-Wei Chao ,  Chrong-Jung Lin ,  Ya-Chin King

    IPC分类号： H01L31/18

    CPC分类号： H01L31/153 ,  G02F2201/58

    摘要： A method of fabricating a photo sensor includes the following steps. First, a substrate is provided, having a conductive layer, a buffer dielectric layer, a patterned semiconductor layer, a dielectric layer, and a planarization layer disposed thereon from bottom to top, wherein the patterned semiconductor layer comprises a first doped region, an intrinsic region, and a second doped region disposed in order. Then, the planarization layer is patterned to form an opening in the planarization layer to expose a portion of the dielectric layer, wherein the opening is positioned on the intrinsic region and portions of the first and the second doped regions. Thereafter, at least a patterned transparent conductive layer is formed in the opening, covering the boundary of the intrinsic region and the first doped region and the boundary of the intrinsic region and the second doped region.

    摘要翻译： 一种制造光传感器的方法包括以下步骤。 首先，提供具有导电层，缓冲电介质层，图案化半导体层，电介质层和从底部到顶部设置在其上的平坦化层的衬底，其中所述图案化半导体层包括第一掺杂区域， 区域，以及依次布置的第二掺杂区域。 然后，对平坦化层进行图案化以在平坦化层中形成开口，以暴露电介质层的一部分，其中开口位于本征区域和第一和第二掺杂区域的部分上。 此后，至少在开口中形成图案化的透明导电层，覆盖本征区域和第一掺杂区域以及本征区域和第二掺杂区域的边界的边界。

    Methods of forming silicon nanocrystals by laser annealing
    10.
    发明授权
    Methods of forming silicon nanocrystals by laser annealing 有权
    通过激光退火形成硅纳米晶体的方法

    公开(公告)号：US07857907B2

    公开(公告)日：2010-12-28

    申请号：US11698261

    申请日：2007-01-25

    申请人： An-Thung Cho ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Wan-Yi Liu ,  Ming-Wei Sun

    发明人： An-Thung Cho ,  Chih-Wei Chao ,  Chia-Tien Peng ,  Wan-Yi Liu ,  Ming-Wei Sun

    IPC分类号： C30B25/00 ,  C30B28/12

    CPC分类号： C23C16/345 ,  C23C16/401 ,  C23C16/56 ,  Y10S977/784 ,  Y10S977/809 ,  Y10S977/814 ,  Y10S977/844 ,  Y10S977/89 ,  Y10S977/891

    摘要： The present invention relates to a method for forming a layered structure with silicon nanocrystals. In one embodiment, the method comprises the steps of: (i) forming a first conductive layer on a substrate, (ii) forming a silicon-rich dielectric layer on the first conductive layer, and (iii) laser-annealing at least the silicon-rich dielectric layer to induce silicon-rich aggregation to form a plurality of silicon nanocrystals in the silicon-rich dielectric layer. The silicon-rich dielectric layer is one of a silicon-rich oxide film having a refractive index in the range of about 1.4 to 2.3, or a silicon-rich nitride film having a refractive index in the range of about 1.7 to 2.3. The layered structure with silicon nanocrystals in a silicon-rich dielectric layer is usable in a solar cell, a photodetector, a touch panel, a non-volatile memory device as storage node, and a liquid crystal display.

    摘要翻译： 本发明涉及一种用硅纳米晶形成层状结构的方法。 在一个实施例中，该方法包括以下步骤：（i）在衬底上形成第一导电层，（ii）在第一导电层上形成富硅介电层，和（iii）至少激光退火硅 富集的介电层以诱导富硅聚集在富硅介电层中形成多个硅纳米晶体。 富硅电介质层是折射率在约1.4至2.3范围内的富硅氧化物膜之一，或折射率在约1.7至2.3范围内的富含硅的氮化物膜之一。 在富硅介电层中具有硅纳米晶体的分层结构可用于太阳能电池，光电检测器，触摸面板，作为存储节点的非易失性存储器件和液晶显示器。