Abstract:
A CMOS memory stores DPMS-Enable/Disable data set by the user. When a display power save request has been issued from an operating system or an application program, the VBE/PM of a VGA BIOS determines, with reference to the DPMS-Enable/Disable data, whether or not a DPMS function is enabled. The VBE/PM executes the DPMS function including the interruption of the supply of horizontal and vertical synchronization signals, if the DPMS function is enabled, and does not execute the DPMS function if it is disabled. Thus, the execution of the DPMS control function can be allowed or prohibited in accordance with the contents of the DPMS-Enable/Disable data.
Abstract:
A display control apparatus makes it possible to display a window on a display screen. The apparatus includes a display memory 21 for storing display data, a reading section 25 for reading the display data from the display memory, a color generating section (24 and 28) for generating color-designating data in accordance with the display data, a display for displaying the color-designating data on the display screen, and a data changing section for changing the color-designating data generated by the color generating section (24 and 28) to different color-designating data, when the color displayed on the display screen by the display is identical to the color of the window displayed, to thereby alter the color of the window.
Abstract:
A computer system having a system body, a CPU, a modem control register, a built-in modem board, and an extended unit. When both the modem board and the extended unit are connected to the system body, the CPU determines whether the base address of the modem board is also the same as the base address of the extended unit. If same base address is used, the CPU sets hardware control data into the modem control register, which disables the modem board, whereby the modem board is disabled.
Abstract:
A memory system of a computer, such as a lap-top type personal computer, uses a standard memory having a reserve region of, for example, 384 KB or 512 KB, and an extended memory of, for example, 1 MB or 2 MB, mounted in a memory extend slot. The memory extend slot can produce a memory type signal representative of the type of extended memory. A capacity detector detects the capacity of the extended memory mounted in the memory extend slot based on the memory type signal output from the memory extend slot. A memory controller then assigns a reserve region to an address region following the address region of the extended memory, based on the capacity detection signal output from the capacity detector.
Abstract:
A moving picture encoder and encoding method for encoding a moving picture signal are disclosed. The moving picture encoder includes a plurality of reference picture memory areas, each area storing picture data of a reference picture to be used for prediction; and a prediction picture generator including a motion compensator that generates the predicted picture by using the picture data stored in the reference picture memory area, a parameter representing a motion between an image to be predicted and the reference picture and prediction mode information indicating a prediction mode corresponding to a prediction method used for generating a predicted picture, and a memory updater that controls a timing of updating the picture data of a full frame stored in the reference picture memory area; and a multiplexer that multiplexes an information representing memory update in a bitstream.
Abstract:
A method and a video decoder for decoding an encoded bitstream of video data in a picture encoding and decoding system are disclosed. The video decoder includes a motion compensation unit for calculating a position for a sample image portion using an encoded bitstream of video data having a motion vector and rounding information. The calculated position of a sample image is rounded with the rounding information. The rounding information indicates the accuracy for rounding, and it is decoded from the bitstream. An image reconstruction unit reconstructs a decoded image portion of the video data from the sample image portion.
Abstract:
A method and a video decoder for decoding an encoded bitstream of video data in a picture encoding and decoding system are disclosed. The video decoder includes a motion compensation unit for calculating a position for a sample image portion using an encoded bitstream of video data having a motion vector and rounding information. The calculated position of a sample image is rounded with the rounding information. The rounding information indicates the accuracy for rounding, and it is decoded from the bitstream. An image reconstruction unit reconstructs a decoded image portion of the video data from the sample image portion.
Abstract:
An image decoding apparatus is capable of decoding coded bit streams with different coding schemes. The image decoding apparatus includes a coding scheme decision section for deciding a coding scheme from coding scheme identification information multiplexed into a coded bit stream, a setting unit for setting header information on a second coding scheme in accordance with header information in a first coding scheme, and a decoder for decoding image coded data in the first coding scheme in response to the header information on the second coding scheme, which is set.
Abstract:
An image decoding apparatus is capable of decoding coded bit streams with different coding schemes. The image decoding apparatus includes a coding scheme decision section for deciding a coding scheme from coding scheme identification information multiplexed into a coded bit stream, a setting unit for setting header information on a second coding scheme in accordance with header information in a first coding scheme, and a decoder for decoding image coded data in the first coding scheme in response to the header information on the second coding scheme, which is set.
Abstract:
A coded bit stream generated on a coding side consists of a VO header, a VOL header, a GOV header, a VOP header and VOP data, and the VOL header multiplexes an object intra-coded indicator signal indicating whether all the VOP data contained in a VOL or GOV are intra coded or not. This enables a decoding side to recognize whether all the VOP data contained in the VOL or GOV in the coded bit stream are intra coded or not by only analyzing the object intra-coded indicator signal. This can facilitate such processings as frame skip control or random access of the VOPs.