公开(公告)号：US09819948B2

公开(公告)日：2017-11-14

申请号：US14741279

申请日：2015-06-16

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang

IPC: H04N19/105 ,  H04N19/196 ,  H04N19/136 ,  H04N19/187 ,  H04N19/70 ,  H04N19/184 ,  H04N19/31 ,  H04N19/503 ,  H04N19/463 ,  H04N19/85 ,  H04N19/46 ,  H04N19/30 ,  H04N19/44 ,  H04N19/423

CPC classification number: H04N19/196 ,  H04N19/105 ,  H04N19/136 ,  H04N19/184 ,  H04N19/187 ,  H04N19/30 ,  H04N19/31 ,  H04N19/423 ,  H04N19/44 ,  H04N19/46 ,  H04N19/463 ,  H04N19/503 ,  H04N19/70 ,  H04N19/85

Abstract: In one example, a device for coding (e.g., encoding or decoding) video data includes a memory configured to store video data, and a video coder configured to code a value for a syntax element that indicates a number of sub-layers of a bitstream for which hypothetical reference decoder (HRD) parameters are coded, wherein the value indicates that the number of sub-layers for which HRD parameters are coded is less than a maximum number of sub-layers indicated by a video parameter set (VPS) of the bitstream, code HRD parameters for the number of sub-layers as indicated by the value for the syntax element, and process the bitstream using the HRD parameters.

公开(公告)号：US09819945B2

公开(公告)日：2017-11-14

申请号：US14749544

申请日：2015-06-24

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang ,  Fnu Hendry ,  Adarsh Krishnan Ramasubramonian

IPC: H04N11/02 ,  H04N19/174 ,  H04N19/70 ,  H04N19/187 ,  H04N19/423 ,  H04N19/44 ,  H04N19/129 ,  H04N19/30 ,  H04N19/513 ,  H04N19/196 ,  H04N19/40

CPC classification number: H04N19/174 ,  H04N19/129 ,  H04N19/187 ,  H04N19/196 ,  H04N19/30 ,  H04N19/40 ,  H04N19/423 ,  H04N19/44 ,  H04N19/513 ,  H04N19/70

Abstract: A device for processing video data includes a memory configured to store at least a portion of a bitstream of multi-layer video data and one or more processors configured to generate a first video coding layer (VCL) network abstraction layer (NAL) unit for a first picture of an access unit, the first VCL NAL unit comprising a first slice type; generate a second VCL NAL unit for a second picture of the access unit, the second VCL NAL unit comprising a second slice type; and generate an access unit delimiter (AUD) NAL unit based on the first and second slice types.

公开(公告)号：US09813736B2

公开(公告)日：2017-11-07

申请号：US14496807

申请日：2014-09-25

Applicant: QUALCOMM Incorporated

Inventor： Ying Chen ,  Ye-Kui Wang

IPC: H04N19/30 ,  H04N19/70 ,  H04N19/597 ,  H04N19/463

CPC classification number: H04N19/597 ,  H04N19/30 ,  H04N19/463 ,  H04N19/70

Abstract: A video decoder receives a value for a first syntax element representing whether a dependency type syntax element for a current layer is signaled, wherein the dependency type syntax element identifies a type of dependency of a current layer relative to a reference layer; and in response to the value for the first syntax element indicating that the dependency type syntax element is not signaled determines that the type of dependency of the current layer relative to the reference layer is a predetermined type and decodes a block of the current layer using inter-layer prediction conforming to the predetermined type.

公开(公告)号：US09807406B2

公开(公告)日：2017-10-31

申请号：US14656469

申请日：2015-03-12

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang ,  Fnu Hendry

IPC: H04N7/12 ,  H04N11/02 ,  H04N11/04 ,  H04N19/33 ,  H04N19/167 ,  H04N19/18 ,  H04N19/187 ,  H04N19/196 ,  H04N19/70 ,  H04N19/30 ,  H04N19/423 ,  H04N19/597

CPC classification number: H04N19/33 ,  H04N19/167 ,  H04N19/18 ,  H04N19/187 ,  H04N19/196 ,  H04N19/30 ,  H04N19/423 ,  H04N19/597 ,  H04N19/70

Abstract: An apparatus according to certain aspects includes a memory and a processor configured to: in response to determining that a reference layer intra random access point (IRAP) picture starts a new coded video sequence (CVS) at the current AU: determine whether the reference layer IRAP picture activates a new video parameter set (VPS) or defines a prediction boundary at the current AU; in response to determining that the reference layer IRAP picture activates a new VPS or defines a prediction boundary at the current AU, remove pictures in the decoded picture buffer (DPB) associated with each of a plurality of layers; and in response to determining that the reference layer IRAP picture does not activate a new VPS and does not define a prediction boundary at the current AU, remove only pictures in the DPB associated with the reference layer.

公开(公告)号：US09794626B2

公开(公告)日：2017-10-17

申请号：US14700982

申请日：2015-04-30

Applicant: QUALCOMM Incorporated

Inventor： Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang ,  Fnu Hendry ,  Krishnakanth Rapaka

IPC: H04N19/85 ,  H04N19/48 ,  H04N19/39 ,  H04N19/29 ,  H04N19/187 ,  H04N21/45 ,  H04N21/2343 ,  H04N19/44 ,  H04N19/70 ,  H04N19/66 ,  H04N19/30 ,  H04N19/127 ,  H04N19/157 ,  H04N19/436 ,  H04N21/81

CPC classification number: H04N21/4516 ,  H04N19/127 ,  H04N19/157 ,  H04N19/187 ,  H04N19/29 ,  H04N19/30 ,  H04N19/39 ,  H04N19/436 ,  H04N19/44 ,  H04N19/48 ,  H04N19/66 ,  H04N19/70 ,  H04N19/85 ,  H04N21/234327 ,  H04N21/816

Abstract: A video decoder is configured to decode a bitstream that comprises an encoded representation of video data. As part of decoding the bitstream, the video decoder obtains, from the bitstream, one or more syntax elements indicating one or more partitioning schemes. For each respective partitioning scheme of the one or more partitioning schemes, the respective partitioning scheme specifies a respective set of disjoint partitions whose union forms an output layer set. Each respective partition of the respective set of disjoint partitions contains one or more of the layers. The video decoder is further configured to decode each of the partitions of a particular partitioning scheme using different processing cores in a plurality of hardware cores, the particular partitioning scheme being one of the one or more partitioning schemes.

公开(公告)号：US09794595B2

公开(公告)日：2017-10-17

申请号：US14657624

申请日：2015-03-13

Applicant: QUALCOMM Incorporated

Inventor： Fnu Hendry ,  Adarsh Krishnan Ramasubramonian ,  Ye-Kui Wang ,  Vadim Seregin

IPC: H04N19/70 ,  H04N19/124 ,  H04N19/88 ,  H04N19/30 ,  H04N19/187 ,  H04N19/169 ,  H04N19/46 ,  H04N19/60 ,  H04N19/172 ,  H04N19/31

CPC classification number: H04N19/70 ,  H04N19/124 ,  H04N19/172 ,  H04N19/187 ,  H04N19/188 ,  H04N19/30 ,  H04N19/31 ,  H04N19/46 ,  H04N19/60

Abstract: An apparatus for coding video information according to certain aspects includes a memory and a processor. The memory is configured to store video information associated with one or more layers. The processor is configured to code a current access unit (AU) in a bitstream including a plurality of layers, the plurality of layers including a reference layer and at least one corresponding enhancement layer. The processor is further configured to code a first end of sequence (EOS) network abstraction layer (NAL) unit associated with the reference layer in the current AU, the first EOS NAL unit having the same layer identifier (ID) as the reference layer. The processor is also configured to code a second EOS NAL unit associated with the enhancement layer in the current AU, the second EOS NAL unit having the same layer ID as the enhancement layer.

公开(公告)号：US09769492B2

公开(公告)日：2017-09-19

申请号：US14730041

申请日：2015-06-03

Applicant: QUALCOMM Incorporated

Inventor： Fnu Hendry ,  Ye-Kui Wang ,  Adarsh Krishnan Ramasubramonian

IPC: H04N19/547 ,  H04N19/61 ,  H04N19/44 ,  H04N19/70 ,  H04N19/30 ,  H04N19/463

CPC classification number: H04N19/547 ,  H04N19/30 ,  H04N19/44 ,  H04N19/463 ,  H04N19/61 ,  H04N19/70

Abstract: Video data bitstreams may contain bitstream conformance parameters, such as hypothetical reference decoder (HRD) parameters, which may be used to allow a decoder to test the conformance of a received bitstream. In multi-layer codecs transmitted using partitions, the video data may be associated with one or more layer sets. Each layer set may be associated with one or more output layer sets. Each output layer set may be further associated with one or more partitioning schemes. Conformance parameters are mapped to partitions of a partitioning scheme, based upon the output layer set that the partitioning scheme is associated with. This allows for a partition to be associated with different conformance parameters, depending upon the output layer set that is being used.

公开(公告)号：US09756355B2

公开(公告)日：2017-09-05

申请号：US14743632

申请日：2015-06-18

Applicant: QUALCOMM Incorporated

Inventor： Ye-Kui Wang ,  Adarsh Krishnan Ramasubramonian ,  Fnu Hendry

IPC: H04N19/52 ,  H04N19/124 ,  H04N19/70 ,  H04N19/176 ,  H04N19/187 ,  H04N19/597 ,  H04N19/172 ,  H04N19/174 ,  H04N19/182 ,  H04N19/152 ,  H04N19/573 ,  H04N19/58 ,  H04N19/30 ,  H04N19/82 ,  H04N19/105

CPC classification number: H04N19/52 ,  H04N19/124 ,  H04N19/152 ,  H04N19/172 ,  H04N19/174 ,  H04N19/176 ,  H04N19/182 ,  H04N19/187 ,  H04N19/30 ,  H04N19/573 ,  H04N19/58 ,  H04N19/597 ,  H04N19/70

Abstract: Systems and methods for coding video data are disclosed. The method can include determining a reference picture set (RPS) for a current picture based on one or more reference pictures. The method can also include determining a picture order count (POC) value of each reference picture of the RPS and identifying at least one of a number of long-term reference pictures and a number of short-term reference pictures within the RPS. The method can also include applying constraints to the number of long-term pictures and the number of short-term pictures in the RPS, the constraints being based on the POC value and a maximum decoded picture buffer size minus one, if a video sequence parameter (VPS) extension is in use. The method can include generating at least one syntax element identifying the RPS based on the constraints and encoding the current picture based on the at least one syntax element.

公开(公告)号：US09756335B2

公开(公告)日：2017-09-05

申请号：US14318230

申请日：2014-06-27

Applicant: QUALCOMM Incorporated

Inventor： Jianle Chen ,  Ying Chen ,  Ye-Kui Wang ,  Krishnakanth Rapaka ,  Fnu Hendry

IPC: H04N19/70 ,  H04N19/30 ,  H04N19/187 ,  H04N19/597 ,  H04N19/105 ,  H04N19/46 ,  H04N19/196 ,  H04N19/174

CPC classification number: H04N19/105 ,  H04N19/174 ,  H04N19/196 ,  H04N19/30 ,  H04N19/46 ,  H04N19/597 ,  H04N19/70

Abstract: A method of coding video data includes receiving one or more layers of video information. Each layer may include at least one picture. The method can include determining a number of active reference layer pictures associated with at least one picture of the one or more layers. The method can further include determining a number of direct reference layers associated with the at least one of the one or more layers. Based on the number of direct reference layers equaling the number of active reference layer pictures, the method can further include refraining from further signaling inter-layer reference picture information in any video slice associated with at least one of a video parameter set (VPS), a sequence parameter set (SPS), or a picture parameter set (PPS).

公开(公告)号：US09749661B2

公开(公告)日：2017-08-29

申请号：US13718945

申请日：2012-12-18

Applicant: Qualcomm Incorporated

Inventor： Ye-Kui Wang ,  Muhammed Zeyd Coban

IPC: H04N7/26 ,  H04N19/90 ,  H04N19/46 ,  H04N19/463 ,  H04N19/436

CPC classification number: H04N19/90 ,  H04N19/436 ,  H04N19/46 ,  H04N19/463

Abstract: A video encoder signals whether WPP is used to encode a picture of a sequence of video picture. If WPP is used to encode the picture, the video encoder generates a coded slice NAL unit that includes a plurality of sub-streams, each of which includes a consecutive series of bits that represents one encoded row of coding tree blocks (CTBs) in a slice of the picture. A video decoder receives a bitstream that includes the coded slice NAL unit. Furthermore, the video decoder may determine, based on a syntax element in the bitstream, that the slice is encoded using WPP and may decode the slice using WPP.