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公开(公告)号:US11960338B2
公开(公告)日:2024-04-16
申请号:US17182982
申请日:2021-02-23
发明人: Smitha L. Rapaka , Derek E. Gladding , Xiaoling Xu
CPC分类号: G06F1/28 , G06F1/305 , G06F9/4893 , G06F1/329 , Y02D10/00
摘要: An activity smoothener circuit is provided to control rates of change in processing activity to limit di/dt in activity areas of an IC to mitigate voltage droops or overshoots. Controlling the rate of change of activity prevents or reduces instances of a di/dt exceeding a programmed maximum that is based on physical limits of the IC and/or a package. In examples, the activity smoothener circuit includes a hierarchy of smoothening circuits controlling activity in areas down to individual circuit blocks (tiles) including execution circuits. An indication of a desired level of activity is provided to a parent smoothening circuit and the parent smoothening circuit responds with indications of actual activity allowed to occur. At each level of hierarchy, the activity smoothener circuit may use algorithms to generate indications of actual activity based on indications of desired activity and di/dt limits. Di/dt limits and current minimums and maximums are controlled.
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公开(公告)号:US20240118725A1
公开(公告)日:2024-04-11
申请号:US18545806
申请日:2023-12-19
申请人: Ambiq Micro, Inc.
发明人: Scott Hanson
IPC分类号: G06F1/06 , G01R19/00 , G05F1/56 , G05F1/575 , G06F1/12 , G06F1/3237 , G06F1/3287 , G06F1/3296 , G06F11/30 , G06F11/34 , G06F13/10 , H02M3/158 , H03K17/687 , H03L7/00 , H03L7/06 , H03L7/18 , H03L7/181 , H03M1/12
CPC分类号: G06F1/06 , G01R19/0084 , G05F1/56 , G05F1/575 , G06F1/12 , G06F1/3237 , G06F1/3287 , G06F1/3296 , G06F11/3041 , G06F11/3414 , G06F13/102 , H02M3/158 , H03K17/687 , H03L7/00 , H03L7/06 , H03L7/18 , H03L7/181 , H03M1/12 , H02M1/0045 , Y02B70/10 , Y02D10/00
摘要: An adaptive voltage converter adapted to compensate for the exponential sensitivities of sub-threshold and near-threshold circuits. The converter can change its power/performance characteristics between different energy modes. The converter may comprise two or more voltage converters/regulators. A multiplexing circuit selects between the outputs of the several converters/regulators depending on the state of a control signal generated by a control facility. The converter is specially adapted to change the output of each converter/regulator based on a number of variables, including, for example, process corner, temperature and input voltage.
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23.
公开(公告)号:US11943716B2
公开(公告)日:2024-03-26
申请号:US18114676
申请日:2023-02-27
申请人: Seven Networks, LLC
发明人: Michael Luna , Ari Backholm
IPC分类号: H04W52/02 , G06F1/3231 , G06F1/3234 , G06F1/3287 , G06F16/957 , H04L12/12 , H04L67/50 , H04W52/00
CPC分类号: H04W52/0261 , G06F1/3231 , G06F1/3278 , G06F1/3287 , G06F16/9574 , H04L12/12 , H04L67/535 , H04W52/00 , H04W52/02 , H04W52/0219 , H04W52/0222 , H04W52/0229 , H04W52/0235 , H04W52/0254 , H04W52/0258 , Y02D10/00 , Y02D30/70
摘要: A mobile device allows transmission of additional outgoing application data requests in response to occurrence of receipt of data transfer from a remote entity, user input in response to a prompt displayed to the user, and a change in a background status of an application executing on the mobile device. Additional outgoing application data requests are foreground application requests.
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公开(公告)号:US11934243B2
公开(公告)日:2024-03-19
申请号:US17145436
申请日:2021-01-11
发明人: Jun Koyama , Shunpei Yamazaki
IPC分类号: G06F1/00 , G06F1/26 , G06F1/3287
CPC分类号: G06F1/26 , G06F1/3287 , Y02D10/00
摘要: To individually control supply of the power supply voltage to circuits, a semiconductor device includes a CPU, a memory that reads and writes data used in arithmetic operation of the CPU, a signal processing circuit that generates an output signal by converting a data signal generated by the arithmetic operation of the CPU, a first power supply control switch that controls supply of the power supply voltage to the CPU, a second power supply control switch that controls supply of the power supply voltage to the memory, a third power supply control switch that controls supply of the power supply voltage to the signal processing circuit, and a controller that at least has a function of controlling the first to third power supply control switches individually in accordance with an input signal and instruction signals input from the CPU and the signal processing circuit.
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25.
公开(公告)号:US20240069616A1
公开(公告)日:2024-02-29
申请号:US18461712
申请日:2023-09-06
IPC分类号: G06F1/3206 , G06F1/324
CPC分类号: G06F1/3206 , G06F1/324 , Y02D10/00
摘要: A method and apparatus controls power management of a graphics processing core when multiple virtual machines are allocated to the graphics processing core on a much finer-grain level than conventional systems. In one example, the method and apparatus processes a plurality of virtual machine power control setting requests to determine a power control request for a power management unit of a graphics processing core. The method and apparatus then controls power levels of the graphics processing core with the power management unit based on the determined power control request.
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公开(公告)号:US11915061B2
公开(公告)日:2024-02-27
申请号:US17510601
申请日:2021-10-26
申请人: Dell Products L.P.
CPC分类号: G06F9/5094 , G06F9/4856 , G06F9/5055 , G06F9/5077 , G06F2209/501 , G06F2209/508 , G06F2209/5022 , Y02D10/00
摘要: A datacenter includes a datacenter efficiency management system coupled to node devices. For each of the node devices and based on a power consumption associated with that node device and a performance associated with that node device, the datacenter efficiency management system generates a node group ranking that it uses to group subsets of the node devices into respective homogenous node groups, and then deploys a respective workload on at least one node device in each of the homogenous node groups. Based on at least one of a node workload bandwidth, a node power consumption, and a node health of each node device on which a workload was deployed, the datacenter efficiency management system then generates a workload performance efficiency ranking of the node devices that it then uses to migrate at least one workload between the node devices.
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公开(公告)号:US11907538B2
公开(公告)日:2024-02-20
申请号:US18045067
申请日:2022-10-07
发明人: Jani Hyvonen , Kimmo J. Mylly , Jussi Hakkinen , Yevgen Gyl
CPC分类号: G06F3/061 , G06F3/0659 , G06F3/0673 , G06F12/0646 , G06F12/1458 , G06F13/1694 , G06F13/28 , G11C7/20 , G06F12/1433 , G06F12/1441 , G06F21/79 , G06F2212/1052 , Y02D10/00
摘要: Methods, systems and devices for configuring access to a memory device are disclosed. The configuration of the memory device may be carried out by creating a plurality of access profiles that are adapted to optimize access to the memory device in accordance with a type of access. For example, when an application with specific memory access needs is initiated, the memory access profile that is designed for that particular access need may be utilized to configure access to the memory device. The configuration may apply to a portion of the memory device, a partition of the memory device, a single access location on the memory device, or any combination thereof.
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公开(公告)号:US11893202B2
公开(公告)日:2024-02-06
申请号:US17841959
申请日:2022-06-16
申请人: NEC CORPORATION
发明人: Sho Ryo
IPC分类号: G06F3/0481 , G06F1/3218 , G06F1/3228 , G06F1/3215 , G06F1/3234 , G06F1/16 , H04W52/02 , H04M1/72463 , G06F1/3231 , G06F3/04842 , G06F3/0488
CPC分类号: G06F3/0481 , G06F1/1626 , G06F1/3215 , G06F1/3218 , G06F1/3228 , G06F1/3231 , G06F1/3265 , G06F3/04842 , H04M1/724634 , H04W52/0254 , G06F3/0488 , Y02D10/00 , Y02D30/70
摘要: A portable communication device (1) is capable of setting a sleep mode as an operation mode. An operation receiver (101) receives operations given by a user. A setter (102) sets the operation mode to the sleep mode when the operation receiver (101) receives no operation for a first time period. A displayer (103) displays an indicator on a display when the operation receiver (101) receives a first operation in the sleep mode. A launcher (104) launches, when the operation receiver (101) receives operations for specifying the indicator, an application program associated with the specified indicator.
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公开(公告)号:US20240028535A1
公开(公告)日:2024-01-25
申请号:US18478359
申请日:2023-09-29
发明人: Andrew DeHennis , Abhi Chavan , James Masciotti
CPC分类号: G06F13/287 , H04B5/0075 , H02J50/10 , H04B5/0037 , G01N33/50 , Y02D10/00
摘要: A sensing system including analyte sensing devices, an interface device, and shared communication device. The interface device may be configured to receive a power signal and generate power for powering the sensing devices and to convey data signals generated by the sensing devices. The sensing system may be configured to receive addressed and unaddressed commands. The sensing devices may be configured to perform activities (e.g., measurement sequences) in parallel in response to the unaddressed commands (e.g., unaddressed measurement commands). The sensing devices may be configured to only perform activities (e.g., conveying measurement data) in response to addressed commands (e.g., addressed read measurement data commands) if the sensing devices determine that the addressed commands are addressed to them. The sensing devices may be configured to perform different measurement sequences in response to an unaddressed measurement command to minimize interference caused by the sensing devices performing the measurement sequences in parallel.
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公开(公告)号:US11882524B2
公开(公告)日:2024-01-23
申请号:US17131927
申请日:2020-12-23
申请人: Intel Corporation
IPC分类号: H04W52/02 , G06F13/14 , G06F1/3234
CPC分类号: H04W52/028 , G06F1/3278 , G06F13/14 , H04W52/0229 , H04W52/0251 , Y02D10/00 , Y02D30/70
摘要: In various aspects, power saving host-modem interactions are described herein. For instance, a host of a communication device includes a host processor that receives, via an interface, information about the reduced activity state of a modem of the communication device including an indication of the RRC state of the modem. It also receives, via the interface, information about a projected expiration of a reduced activity period of the modem including an indication of a time remaining until a next event of the modem. The host processor controls a reduction of an operation of a component of the communication device during the reduced activity period of the modem, based on the indication of the RRC state of the modem and the indication of the time remaining until the next event of the modem. The reduced activity state of the modem corresponding to the reduced activity period of the modem.
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