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公开(公告)号：US12003251B2
公开(公告)日：2024-06-04
申请号：US17703300
申请日：2022-03-24
摘要： An inductive current digital-to-analog converter (DAC) includes: a power supply input adapted to be coupled to a power supply; a load terminal adapted to be coupled to a load; an inductor between the power supply input and the load terminal; and inductor current control circuitry. The inductor current control circuitry has: a sense signal input configured to receive a sense signal representative of the inductor current; a control code input configured to receive a control code; a set of switches having respective control terminals; and a set of control circuit outputs coupled to the respective control terminals of the set of switches. The inductor current control circuitry is configured to adjust control signals provided to the set of control circuit outputs based on the sense signal and the control code.
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22.发明申请公开(公告)号：US20150263746A1
公开(公告)日：2015-09-17
申请号：US14657728
申请日：2015-03-13
发明人： Kei SHIRAISHI , Masanori FURUTA , Junya MATSUNO , Tetsuro ITAKURA
CPC分类号： H03M1/0836 , H03M1/001 , H03M1/08 , H03M1/0845 , H03M1/66 , H03M1/665 , H03M1/742
摘要： According to an embodiment, a power supply noise cancelling circuit includes a generator, a first multiplier, a subtractor and a digital-to-analog converter. The generator generates a sine wave signal. The first multiplier multiplies a digital input signal by a digital signal based on the sine wave signal to generate a first digital product signal. The subtractor subtracts a digital signal based on the first digital product signal from the digital input signal to generate a digital difference signal. The digital-to-analog converter performs a digital-to-analog conversion on the digital difference signal to obtain an analog output signal.
摘要翻译： 根据实施例，电源噪声消除电路包括发生器，第一乘法器，减法器和数模转换器。 发生器产生正弦波信号。 第一乘法器基于正弦波信号将数字输入信号乘以数字信号以产生第一数字乘积信号。 减法器基于来自数字输入信号的第一数字乘积信号减去数字信号，以产生数字差分信号。 数模转换器对数字差分信号执行数模转换以获得模拟输出信号。
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公开(公告)号：US08797195B1
公开(公告)日：2014-08-05
申请号：US13905208
申请日：2013-05-30
申请人： Bhavesh V. Patel
发明人： Bhavesh V. Patel
CPC分类号： H03M1/1071 , H03M1/00 , H03M1/665 , H03M1/747
摘要： The present invention is typically embodied as a portable handheld unit that generates synchro signals for input into synchro motors and other synchro devices. A primary genre of inventive application is the testing of hardware and software in synchro systems. The inventive unit typically includes a numeric keypad, an LCD display, a microcontroller, a serial-to-parallel binary data converter, and at least one digital-to-synchro converter. The keypad and display are used to enter decimal data. The microcontroller converts the decimal data to serial binary data. The serial-to-parallel binary data converter converts the serial binary data to parallel binary data. The digital-to-synchro converter(s) convert(s) the parallel binary data to synchro analog data. Some inventive embodiments implement plural digital-to-synchro converters individually corresponding to channels for independently outputting synchro signals. Each channel can represent a specific type of synchro operation, e.g., ship rudder angle, ship speed, ship engine shaft revolution, ship heading, etc.
摘要翻译： 本发明通常被实施为便携式手持单元，其产生用于输入到同步电动机和其它同步装置的同步信号。 创新应用的主要类型是在同步系统中测试硬件和软件。 本发明的单元通常包括数字小键盘，LCD显示器，微控制器，串行到并行二进制数据转换器和至少一个数字至同步转换器。 键盘和显示屏用于输入十进制数据。 微控制器将十进制数据转换为串行二进制数据。 串行到并行二进制数据转换器将串行二进制数据转换为并行二进制数据。 数字至同步转换器将并行二进制数据转换为同步模拟数据。 一些创造性实施例实现了单独对应于用于独立地输出同步信号的通道的多个数模转换器。 每个通道可以表示特定类型的同步操作，例如船舵角，船速，船舶发动机轴转，船舶航向等。
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公开(公告)号：US20130342377A1
公开(公告)日：2013-12-26
申请号：US13922927
申请日：2013-06-20
摘要： One embodiment includes a phase-based analog-to-digital converter (ADC) system. The system includes a voltage-to-phase converter configured to convert an input voltage to a phase difference corresponding to a phase-delay with respect to an input clock signal that is based on a magnitude of the input voltage. The system also includes a phase-to-digital converter configured to convert the phase difference into a digital output signal having a digital value corresponding to a magnitude of the phase difference.
摘要翻译： 一个实施例包括基于相位的模数转换器（ADC）系统。 该系统包括电压相变转换器，其被配置为将输入电压转换为相对于基于输入电压的幅度的输入时钟信号的相位延迟的相位差。 该系统还包括配置成将相位差转换成具有对应于相位差大小的数字值的数字输出信号的相数转换器。
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公开(公告)号：US08502716B1
公开(公告)日：2013-08-06
申请号：US13418086
申请日：2012-03-12
申请人： Toru Matsuura
发明人： Toru Matsuura
IPC分类号： H03M1/66
CPC分类号： H03M1/1009 , H03M1/665 , H04B1/0007 , H04L27/364 , H04L27/368
摘要： Phase errors are reduced in an RFDAC. The RFDAC includes: a multi-phase radio-frequency signal generator that generates multiple radio-frequency signal pairs each having a phase difference of π; a vector selector that combines each of the multiple radio-frequency signals which has passed through at least one path; a test signal generator that generates a test signal; a multiplexer that selects either the test signal or the baseband signal; a vector controller that controls the vector selector so as to select a path for each of the multiple radio-frequency signal pairs; a detector that detects output signals outputted from the vector selector; a calibrator that, based on the output signals, calculates a calibration coefficient of a phase error between the radio-frequency signals of each of the multiple radio-frequency signal pairs, and calibrates the multiple radio-frequency signals or the baseband signal.
摘要翻译： RFDAC中的相位误差降低。 RFDAC包括：多相射频信号发生器，其产生多个具有π相位差的射频信号对; 矢量选择器，其组合已经通过至少一个路径的多个射频信号中的每一个; 产生测试信号的测试信号发生器; 选择测试信号或基带信号的多路复用器; 矢量控制器，其控制所述矢量选择器，以选择所述多个射频信号对中的每一个的路径; 检测器，其检测从矢量选择器输出的输出信号; 校准器，其基于所述输出信号计算所述多个射频信号对中的每一个的所述射频信号之间的相位误差的校准系数，并且校准所述多个射频信号或所述基带信号。
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公开(公告)号：US3832707A
公开(公告)日：1974-08-27
申请号：US28539372
申请日：1972-08-30
发明人： BUCHANAN J , NELSON C
CPC分类号： H03M1/665
摘要： A digital to analog (D/A) converter suitable for application to digital to synchro (D/S) conversion comprises serial MOS FET (Metallic Oxide Semiconductor-Field Effect Transistor) switches and an inverting amplifier, or buffer, to compensate for variations in FET resistance in the ON state. A reference voltage of a given polarity is gated ON in one FET and inverted in polarity in an amplifier with a gain of 1.0 for input to a bank of FET switches associated with a binary resistance network, accomplishing directly the conversion of digital data to an analog equivalent output. The reference voltage thereby gated in the first FET with one polarity is subsequently gated in the second FET switches, of the bank associated with the network, and with the opposite polarity, such that a nearly constant resistance path is afforded from the reference voltage to the output of the second FET switches. Employing identical FET switches throughout the D/A converter, the non-linear properties of the FET switches are compensated regardless of reference voltage polarity. To improve further the accuracy of D/A conversion of the invention, an input resistance is selected for the inverting amplifier equal in value to the resistance of the most significant bit resistor. Compensating resistors affording resistance equalization are provided for at least a few of the next, most significant bit positions resulting in highly accurate digital to analog and digital to synchro conversion using low cost MOS FET switches with high ON resistance.
摘要翻译： 适用于数字到同步（D / S）转换的数模（D / A）转换器包括串行MOS FET（金属氧化物半导体场效应晶体管）开关和反相放大器或缓冲器，以补偿 导通状态下的FET电阻。 给定极性的参考电压在一个FET中被门控导通，并且在放大器中极性反转，放大器的增益为1.0，用于输入到与二进制电阻网络相关联的一组FET开关，直接实现数字数据到模拟 等效输出。 因此，在具有一个极性的第一FET中选通的参考电压随后在与网络相关联的存储体的第二FET开关中并且具有相反的极性，使得从参考电压提供几乎恒定的电阻路径 输出第二个FET开关。 在整个D / A转换器中采用相同的FET开关，无论参考电压极性如何，均可补偿FET开关的非线性特性。 为了进一步提高本发明的D / A转换的精度，选择反相放大器的输入电阻值与最高有效位电阻器的电阻值相等。 提供电阻均衡的补偿电阻提供给下一个最高有效位位置的至少几个，从而使用具有高导通电阻的低成本MOS FET开关实现高精度的数模转换和数字转换到同步转换。
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公开(公告)号：US3675234A
公开(公告)日：1972-07-04
申请号：US3675234D
申请日：1971-02-11
申请人： SPERRY RAND CORP
发明人： METZ LOUIS C
CPC分类号： H03M1/665
摘要： A digital-data to shaft-angle converter that compensates for the non-linear relationship between a 12-bit data word theta 12, representing the desired shaft angle, and its corresponding trigonometric sine and cosine functions as represented by analog voltages. Basically the invention constructs, by empirical means and using linear voltage signals, first and second voltage segments whose amplitudes closely approximate sine and cosine functions, respectively, over the 0* - 45* range. The invention is also capable of constructing by empirical means, third and fourth signals which are mirror images of the first and second signals described above. By proper selection of two of the four possible signals described above and assigning a proper polarity thereto, all in accordance with a truth table, sine and cosine analog voltage signals are generated which can be employed to drive the synchro shaft to any desired angle angular position from 0* to 360*. Both the generation of the 0 - 45 sine and cosine voltage segments (and their mirror images) and the selecting of the proper ones of such generated voltage segments are effected by logic which is directly under the control of the data word theta 12.
摘要翻译： 数字数据到轴角转换器，用于补偿表示期望轴角的12位数据字theta 12与由模拟电压表示的相应的三角正弦和余弦函数之间的非线性关系。 基本上，本发明通过经验手段和使用线性电压信号，分别在0°-45°范围内分别振幅近似正弦和余弦函数的第一和第二电压段构成。 本发明还能够通过经验手段，第三和第四信号构成上述第一和第二信号的镜像。 通过适当选择上述四种可能的信号中的两种并且为其分配适当的极性，全部根据真值表产生正弦和余弦模拟电压信号，其可用于将同步轴驱动到任何期望的角度角位置 从0°到360°。 0-45正弦和余弦电压段（及其镜像）的产生和这些产生的电压段的适当选择都由直接在数据字theta 12的控制下的逻辑实现。
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公开(公告)号：US3588880A
公开(公告)日：1971-06-28
申请号：US3588880D
申请日：1968-10-24
发明人： GROSS ROBERT D , MASEL MARVIN , SCHOLL PETER K
摘要： A MULTIPLEXING DIGITAL TO ANALOG CONVERTER COMPRISING: INPUT GATE MEANS TO RECEIVE MORE THAN ONE DIGITAL SIGNAL, AN OUTPUT SECTION COUPLED TO THE INPUT GATE MEANS, A REFERENCE SIGNAL SOURCE COUPLED TO THE INPUT GATE MEANS, A REFERENCE EACH DIGITAL SIGNAL TO AC FORM AND CONNECTIONS TO FEED SAID CONVERTED SIGNAL TO THE OUTPUT SECTION, SAMPLING MEANS TO RAPIDLY SAMPLE THE CHANGING VALUES IN SAID OUTPUT SECTION FOR STORAGE, CAPACITOR STORAGE MEANS COUPLED TO THE OUTPUT SECTION FOR STORING SAID VALUES THEREON, AND, OUTPUT FILTER AND AMPLIFIER MEANS FED BY SAID CAPACITOR STORAGE MEANS TO PROVIDE SMOOTHLY CHANGING AC OUTPUTS CORRESPONDING TO EACH OF SAID DIGITAL SIGNALS.
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29.发明授权
公开(公告)号：US3543150A
公开(公告)日：1970-11-24
申请号：US3543150D
申请日：1967-10-18
申请人： PHILIPS CORP
发明人： BRANDENBURG KLAUS
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30.发明授权System for modulating input signals with digital reference signals for generating resolver drive signals 失效用于调制输入信号用于生成分辨率驱动信号的数字参考信号的系统
公开(公告)号：US3478198A
公开(公告)日：1969-11-11
申请号：US3478198D
申请日：1967-06-06
发明人： LEWIS HAROLD F , HAYES MONSON H JR
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