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公开(公告)号：US4045793A
公开(公告)日：1977-08-30
申请号：US617923
申请日：1975-09-29
申请人： Jerry Dale Moench
发明人： Jerry Dale Moench
CPC分类号： H03M1/0863
摘要： An MOS digital to analog converter on a semiconductor chip includes N digital inputs and a single analog output. The digital inputs control circuitry which switches in various combinations of 2.sup.0 +2.sup.1 +...2.sup.N-1 IGFETs with substantially similar voltage current characteristics coupled between a voltage supply conductor and an analog current output conductor. The IGFETs are arranged in N groups, each group being controlled, respectively, by one of the digital inputs. The number of IGFETs in each group is given by the expression 2.sup.n-1 where 1.ltoreq.n.ltoreq.N. A control circuit including a plurality of substantially identical diode-connected IGFETs is coupled between a constant current source and the voltage supply conductor. The voltage supply conductor provides a voltage which is gated by means of switching circuitry controlled by the digital inputs to the gate electrodes, respectively, of each of the groups of IGFETs. This circuit controls the ratio between the analog output current and the current of the current source, and also assures that each of the IGFETs connected to the analog output conductor operates in the saturation portion of its current-voltage characteristic.
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公开(公告)号：US4020486A
公开(公告)日：1977-04-26
申请号：US642692
申请日：1975-12-22
申请人： James J. Pastoriza
发明人： James J. Pastoriza
CPC分类号： H03M1/745
摘要： A digital-to-analog converter comprising an IC switch module providing four switch transistors and associated switch-control buffering circuitry. The emitter areas of the switch transistors are binarily weighted to provide equal current densities. The IC substrate also is formed with a fifth transistor to serve as a reference transistor for adjusting the supply voltage as necessary to maintain constant current through the switch transistors. To construct a digital-to-analog converter having a high bit resolution, a number of such "quad" switch modules may be combined, for example in a printed circuit card assembly including a thin-film resistor module providing binarily-weighted resistors on a glass substrate to set the current levels through the switch transistors.
摘要翻译： 一种数模转换器，包括提供四个开关晶体管和相关的开关控制缓冲电路的IC开关模块。 开关晶体管的发射极区域被二次加权以提供相等的电流密度。 IC基板也形成有第五晶体管，用作参考晶体管，用于根据需要调节电源电压以保持恒定的电流通过开关晶体管。 为了构建具有高比特分辨率的数模转换器，可以将多个这样的“四通道”开关模块组合在一起，例如在包括薄膜电阻模块的印刷电路卡组件中，该薄膜电阻模块在一个 玻璃基板通过开关晶体管来设置电流电平。
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公开(公告)号：US3961326A
公开(公告)日：1976-06-01
申请号：US505477
申请日：1974-09-12
申请人： Robert B. Craven
发明人： Robert B. Craven
CPC分类号： H03M1/745
摘要： An integrated-circuit 12-bit digital-to-analog converter comprising binarily-scaled constant-current sources with associated switch cells employing bipolar transistors to direct the bit currents either to a summing bus or to ground. The switch cells include a first differential transistor pair to translate a single-ended binary logic signal to double-ended (balanced) format, and a second, fully-balanced differential pair operated by the balanced logic signal to direct the bit current correspondingly. A bias-generating circuit maintains a constant collector-base voltage at the constant-current source. The threshold voltage for the logic signals can be set for TTL logic or, by pin-programming, for CMOS logic of either low-voltage or high-voltage type.
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公开(公告)号：US3906489A
公开(公告)日：1975-09-16
申请号：US45566474
申请日：1974-03-28
申请人： SIEMENS AG
发明人： SCHLICHTE MAX
摘要： A digital-to-analog converter is described. Only one resistorladder network is used to achieve a non-linear characteristic when converting a digital signal to an analog signal. One group of the bits of the digital signal that fixes a signal amplitude controls the supply of a constant current to a corresponding number of adjacent junction points or nodes between one leakage resistor and at least one shunt resistor of the resistor-ladder network. Another group of the bits determines the positions of the junction points suitable for the supply of a constant current relative to an outlet terminal of the ladder network. The invention is employed in an analog-to-digital coder operating according to the iterative process.
摘要翻译： 描述了数模转换器。 在将数字信号转换为模拟信号时，仅使用一个电阻梯形网络来实现非线性特性。 固定信号幅度的一组数字信号控制向一个泄漏电阻器和电阻梯形网络的至少一个分流电阻器之间的相应数量的相邻连接点或节点提供恒定电流。 另一组位确定适合于相对于梯形网络的出口端子提供恒定电流的连接点的位置。 本发明用于根据迭代过程操作的模数转换器。
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公开(公告)号：US3895378A
公开(公告)日：1975-07-15
申请号：US42578073
申请日：1973-12-18
申请人： CIT ALCATEL
摘要： Decoder having modular constitution for transmission by coded pulses constituted by several identical individual modules wired up and interconnected so as to perform, in interrelation, various elementary functions of the decoding. Each of the individual modules comprises four operational amplifiers, an output amplifier, a switching device selectively connecting the output of one operational amplifier to the input of the output amplifier, and a logic control circuit responsive to coded bits to actuate the switching device.
摘要翻译： 解码器具有用于通过编码脉冲进行发送的模块化结构，所述编码脉冲由几个相同的单独模块组成，所述多个相同的单独模块布线和互连，以便以相关的方式执行解码的各种基本功能。 每个单独的模块包括四个运算放大器，输出放大器，选择性地将一个运算放大器的输出连接到输出放大器的输入的开关装置，以及响应于编码比特来驱动开关装置的逻辑控制电路。
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公开(公告)号：US3872465A
公开(公告)日：1975-03-18
申请号：US35496973
申请日：1973-04-27
申请人： TEXACO INC
发明人： LOOFBOURROW ROBERT J
摘要： Hereinafter disclosed is methodology and apparatus for converting wide dynamic amplitude range digital data recorded in floating point digital word form, comprising a binary coded mantissa and a binary coded exponent, to an analog signal or visible display, such as an oscillogram, or ''''wiggle trace,'''' of selectively compressed dynamic amplitude range. The digital word occupying a number of binary digit, or bit, positions is, in algebraic form, + OR - AG E; wherein A represents the mantissa or argument, G represents the base, or radix, of the number system employed, and E represents the exponent. Since the radix G is constant, the only bits that have to be recoreded are those bits representing the mantissa A and the exponent E. In reconverting the aforementioned digital data to analog form data for making an oscillogram, wiggle trace or other visible display, the invention involves the selective compression of the dynamic amplitude range of the analog signals and, at the same time, avoiding the introduction of serious distortions.
摘要翻译： 以下公开了用于将包括二进制编码尾数和二进制编码指数的浮点数字字形式记录的宽动态幅度数字数据转换为模拟信号或可见显示（如波形图）或“摆动轨迹 ，“选择性压缩动态幅度范围”。 占用多个二进制数字或位位置的数字字是代数形式，为+/- AG < - > E; 其中A表示尾数或参数，G表示所采用的数字系统的基数或基数，E表示指数。 由于基数G是常数，所以必须重新记录的那些位是表示尾数A和指数E的那些位。在将上述数字数据重新转换成用于进行波形图，摆动轨迹或其他可见显示的模拟形式数据时， 本发明涉及对模拟信号的动态幅度范围的选择性压缩，并且同时避免引入严重的失真。
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公开(公告)号：US3803590A
公开(公告)日：1974-04-09
申请号：US22001672
申请日：1972-01-24
申请人： ANALOG DEVICES INC
发明人： PASTORIZA J
CPC分类号： H03M1/742
摘要： A digital-to-analog converter the output circuit of which comprises a set of switching transistors arranged as current generators. The currents through the switching transistors are maintained constant by means of a supply voltage adjusting circuit comprising a separate reference transistor matched to one of the switching transistors and energized by the same voltage supply lines as the switching transistors. The supply voltage adjusting circuit includes an operational amplifier which senses the collector current of the reference transistor, and adjusts the supply voltage so as to maintain that collector current constant. This automatic adjustment of the supply voltage also maintains the current through the switching transistors constant.
摘要翻译： 一种数模转换器，其输出电路包括一组作为电流发生器布置的开关晶体管。 通过电源电压调节电路将开关晶体管的电流保持恒定，该电源电压调节电路包括与开关晶体管中的一个相匹配并由与开关晶体管相同的电源线供电的独立参考晶体管。 电源电压调节电路包括检测参考晶体管的集电极电流的运算放大器，并调节供电电压，以保持集电极电流恒定。 电源电压的这种自动调节还保持通过开关晶体管的电流恒定。
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公开(公告)号：US3591785A
公开(公告)日：1971-07-06
申请号：US3591785D
申请日：1968-11-19
申请人： WESTERN ELECTRIC CO
发明人： MILLER KENNETH M
摘要： A system for determining a representative value for the average or mean magnitude of a plurality of input signals of diverse magnitudes. The number of input signals received within each of a plurality of magnitude ranges are initially counted within a predetermined period of time, and an analog signal representative of each total count produced. Each analog signal is then normalized with respect to a different predetermined value of magnitude chosen to represent the magnitude of each input signal received within each magnitude range. All of the adjusted analog signals are thereafter combined, with the resulting signal divided by the total number of input signals initially received by the system so as to provide a representative, weighted value for the average magnitude of all of the input signals.
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公开(公告)号：US3582941A
公开(公告)日：1971-06-01
申请号：US3582941D
申请日：1967-11-28
CPC分类号： H03M1/00 , H03M1/34 , H04B14/048
摘要： There is provided a decoder for PCM (pulse code modulated) signals previously coded in binary form from an analog signal. The most significant of seven digits is used to determine the polarity of the original signal and to determine the selection of one or the other of two sets of seven gates. The following three digits control a current generator establishing a source of current having an amplitude eight times (81) that of the basic quantizing step (current level I). The same three digits also establish control of one of seven gates to inject the current from the current generator into a resistor ladder network. The three least significant digits are used in the control of three other current generators (at levels 4I, 2I and I) which supply additional current at the injection point to enable reproduction of the analog signal. An analog signal representing the code group may then be taken between output terminals of the two resistor ladders.
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公开(公告)号：US3581076A
公开(公告)日：1971-05-25
申请号：US3581076D
申请日：1969-07-17
申请人： SPERRY RAND CORP
CPC分类号： H03M1/00 , H03M1/0617
摘要： A current distribution circuit suitable for use in a digital-toanalog converter in which digital signals are applied either directly or through a logic network to selected flip-flop stages such that the flip-flops produce a number of output signals which individually represent a given increment of current. These current increments are made available to a resistive ladder type current metering circuit to produce the desired analog voltage.
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