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公开(公告)号：US11127363B2
公开(公告)日：2021-09-21
申请号：US16302678
申请日：2018-08-16
Inventor： Xin Zhang , Juncheng Xiao , Chao Tian , Yanqing Guan
IPC: G09G3/36
Abstract: A gate driver on array (GOA) circuit, a liquid crystal panel comprising the GOA circuit, and a display device including the liquid crystal panel are provided. The GOA circuit comprises a forward and backward scanning control module configured to control the GOA circuit to perform forward scan or backward scan according to a forward scanning signal or a backward scanning signal respectively, a first voltage stabilizing module configured to maintain a voltage level of a first node, and a second voltage stabilizing module electrically connecting to the forward and backward scanning control module, and configured to maintain a voltage level of an output signal of the forward and backward scanning control module.
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公开(公告)号：US12154470B2
公开(公告)日：2024-11-26
申请号：US17617608
申请日：2021-10-29
Inventor： Haiming Cao , Yanqing Guan , Chao Tian , Fei Ai , Guanghui Liu , Zhifu Li
IPC: G09G3/20 , G09G3/3266 , G09G3/36 , H01L29/786
Abstract: A gate driving circuit and a display panel are disclosed. A pull-up control module and a pull-down module of each stage gate driving unit are connected to a first node. A thin film transistor in the pull-up control module and/or pull-down module that is connected to the first node is an oxide thin film transistor, such that a leakage current of the first node is reduced due to the advantage of the small off-state leakage current of the oxide thin film transistor. Therefore, the voltage level of the first node can remain stable during a pull-up stage and a touch suspension stage.
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公开(公告)号：US12132120B2
公开(公告)日：2024-10-29
申请号：US17598275
申请日：2021-08-06
Inventor： Hong Cheng , Chao Tian , Yanqing Guan , Guanghui Liu
IPC: H01L29/786 , H01L29/423 , G02F1/1368 , H10K59/121
CPC classification number: H01L29/78696 , H01L29/42384 , G02F1/1368 , H10K59/1213
Abstract: A thin film transistor and a display panel are provided. A first dimension of a first transmission portion electrically connected to a source heavily-doped portion is different from a second dimension of a second transmission portion electrically connected to a drain heavily-doped portion, so that an intensity of an electric field of carriers transmitted by the transmission portion corresponding to the larger one of the first dimension or the second dimension is smaller when the thin film transistor is turned on, thereby reducing the bombardment effect of the carriers on a source or a drain and improving the stability of thin film transistor.
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公开(公告)号：US12125424B2
公开(公告)日：2024-10-22
申请号：US17605546
申请日：2021-08-31
Inventor： Mingyue Li , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0286
Abstract: The present application discloses a gate driving circuit and a display panel. The gate driving circuit comprises a plurality of cascaded gate driving modules. A first driving signal can be output through a first output node, and at the same time, a second driving signal with a same phase as the first driving signal can be output through a second output node, and a gate driving sub-module and an in-phase output sub-module share the first output node and a pull-down node, which simplifies a circuit topology of the gate driving circuit.
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公开(公告)号：US20240021122A1
公开(公告)日：2024-01-18
申请号：US17605546
申请日：2021-08-31
Inventor： Mingyue Li , Chao Tian , Yanqing Guan , Fei Ai , Guanghui Liu
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2310/0286
Abstract: The present application discloses a gate driving circuit and a display panel. The gate driving circuit comprises a plurality of cascaded gate driving modules. A first driving signal can be output through a first output node, and at the same time, a second driving signal with a same phase as the first driving signal can be output through a second output node, and a gate driving sub-module and an in-phase output sub-module share the first output node and a pull-down node, which simplifies a circuit topology of the gate driving circuit.
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Patent Agency Ranking
公开(公告)号：US20230402019A1
公开(公告)日：2023-12-14
申请号：US17419876
申请日：2021-05-31
Inventor： Yanqing Guan , Chao Tian , Haiming Cao
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0876
Abstract: A display panel and a gate driving circuit are provided. The gate driving circuit utilizes the pull-down control module to periodically pull up and pull down the voltage level of the second node. The voltage level of the second node is periodically a high voltage level. This effectively reduces the time duration when the second node corresponds to the high voltage level. After the TFTs electrically connected to the second node are forward biased, the TFTs could have sufficient recovery time. This solution effectively improves the bias condition of the TFTs in the pull-down control module and thus makes the circuit more stable and raises the reliability of the circuit.
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公开(公告)号：US11837172B2
公开(公告)日：2023-12-05
申请号：US17622633
申请日：2021-12-15
Inventor： Chao Tian , Yanqing Guan , Guanghui Liu , Fei Ai
IPC: G09G3/3266 , G06F3/041 , G09G3/36
CPC classification number: G09G3/3266 , G06F3/0412 , G06F3/0418 , G06F3/04166 , G09G3/3674 , G09G2310/08 , G09G2354/00
Abstract: A gate driving circuit and a display device are provided. The gate driving circuit includes electrically connected multi-stage driving units. The driving unit of each stage includes an input module, an output module electrically connected with the input module, a pull-down module electrically connected with the output module, and a pull-down control module electrically connected with the pull-down module. The output module is electrically connected to a stage transmission signal output terminal, and the pull-down module is electrically connected to a first control signal terminal.
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公开(公告)号：US11705032B2
公开(公告)日：2023-07-18
申请号：US16961956
申请日：2020-06-12
Inventor： Haiming Cao , Yanqing Guan
IPC: G09G3/20
CPC classification number: G09G3/20 , G09G2300/0426 , G09G2310/0283 , G09G2310/08 , G09G2330/021
Abstract: A driving circuit and a display panel are disclosed. The driving circuit includes a plurality of cascaded driving units. The driving unit includes a forward/backward scan control module, a first control node controlling module, a second control node controlling module, a global control module, a regulating module, a first output module configured to output a stage signal, and a second output module configured to output a gate driving signal. A voltage level of the gate driving signal is higher than a voltage level of the stage signal.
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公开(公告)号：US20200321475A1
公开(公告)日：2020-10-08
申请号：US16308814
申请日：2018-09-22
Inventor： Xin Zhang , Juncheng Xiao , Haifeng Chen , Haijun Tian , Yanqing Guan , Chao Tian
IPC: H01L29/786 , H01L27/12 , H01L21/265 , H01L29/66
Abstract: A manufacturing method for LTPS TFT substrate is disclosed. Through performing two etchings on the gate metal layer, ion heavy doping and ion light doping of the polysilicon active layer are performed in a self-aligned manner such that the LDD structure of the polysilicon active layer is symmetrically distributed on two sides of the gate electrode, which is beneficial to improve device characteristics, is more stable and reliable than the conventional technology, and can reduce the number of process masks, save mask cost, operation cost, material cost and the time cost. The thinning process of the gate insulation layer can reduce the thickness of the gate insulation layer corresponding to the heavily doped region of the polysilicon active layer, so that the ion implantation efficiency can be effectively improved.
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公开(公告)号：US10748499B2
公开(公告)日：2020-08-18
申请号：US15747102
申请日：2017-11-27
Inventor： Yanqing Guan
Abstract: GOA circuit is disclosed comprising m stages GOA units, wherein a n-th stage GOA unit comprises: an output control module, a forward-backward scan control module, a node signal control module, a signal output module, a first pull-down circuit, a second pull-down circuit, and a pull-up circuit, wherein m≥n≥1; output control module controls a n-th stage gate driving signal; first pull-down circuit comprises a 7th thin-film-transistor which first end connected with said output control module, and second end connected with low voltage signal; signal output module comprises a 5th thin-film-transistor which first end connected with high voltage signal and second end connected with third end of said 7th thin-film-transistor; node signal control module controls said 5th thin-film-transistor as conducting or non-conducting; second pull-down circuit controls said 5th thin-film-transistor as non-conducting. Present invention eliminates the sticking and flicker of display panels after out of power improving user experience.
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