公开(公告)号：US11082271B2

公开(公告)日：2021-08-03

申请号：US16900010

申请日：2020-06-12

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Abhijit Anant Patki ,  Madhulatha Bonu ,  Kumar Anurag Shrivastava

IPC: H04L27/22 ,  H03D3/00 ,  H03L7/081 ,  H04L27/227 ,  H03K19/21 ,  H03L7/087 ,  H03L7/113 ,  H04L7/033 ,  H04L7/00

Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.

公开(公告)号：US11038461B2

公开(公告)日：2021-06-15

申请号：US16998526

申请日：2020-08-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Tarunvir Singh ,  Kumar Anurag Shrivastava ,  Somshubhra Paul ,  Sreeram Subramanyam Nasum

IPC: H03B5/12 ,  H03F3/45

Abstract: A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

公开(公告)号：US10978996B2

公开(公告)日：2021-04-13

申请号：US16670741

申请日：2019-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava ,  Madhulatha Bonu

IPC: H03B5/06 ,  H03B5/04 ,  H03B5/12 ,  H03L7/00 ,  H03L3/00

Abstract: Methods and apparatus generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

公开(公告)号：US10734956B1

公开(公告)日：2020-08-04

申请号：US16675779

申请日：2019-11-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Arlo James Aude ,  Eleazar Walter Kenyon ,  Kumar Anurag Shrivastava

IPC: H03F3/45 ,  H03K5/24 ,  H04B1/16 ,  H03K3/037 ,  H04B1/04

Abstract: A signal detection circuit includes a signal input terminal, a rectifier circuit, a comparator circuit; a current source, and a comparator output terminal. The rectifier circuit is coupled to the signal input terminal and is configured to receive an input signal and generate a rectified signal based on the input signal. The comparator circuit is coupled to the rectifier circuit and is configured to receive a common mode signal and to generate a difference current based on a difference of the common mode signal and the rectified signal. The current source is coupled to the comparator circuit and is configured to generate a reference current. The comparator output terminal is configured to provide an output signal based on a difference of the reference current and the difference current.

公开(公告)号：US20200067453A1

公开(公告)日：2020-02-27

申请号：US16670741

申请日：2019-10-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava ,  Madhulatha Bonu

IPC: H03B5/06 ,  H03B5/12 ,  H03L3/00 ,  H03L7/00 ,  H03B5/04

Abstract: Methods and apparatus generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

公开(公告)号：US20180131545A1

公开(公告)日：2018-05-10

申请号：US15860988

申请日：2018-01-03

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Abhijit Anant Patki ,  Madhulatha Bonu ,  Kumar Anurag Shrivastava

IPC: H04L27/22 ,  H04L7/033 ,  H03K19/21 ,  H03L7/113 ,  H03L7/087 ,  H04L7/00

CPC classification number: H04L27/22 ,  H03D3/00 ,  H03K19/21 ,  H03L7/081 ,  H03L7/087 ,  H03L7/113 ,  H04L7/0087 ,  H04L7/0331 ,  H04L27/2271

Abstract: Methods and apparatus for performing a high speed phase demodulation scheme using a low bandwidth phase-lock loop are disclosed. An example apparatus includes a low bandwidth phase lock loop to lock to a data signal at a first phase, the data signal capable of oscillating at the first phase or a second phase; and output a first output signal at the first phase and a second output signal at the second phase, the first output signal or the second output signal being utilized in a feedback loop of the low bandwidth phase lock loop. The example apparatus further includes a fast phase change detection circuit coupled to the low bandwidth phase lock loop to determine whether the data signal is oscillating at the first phase or the second phase.

公开(公告)号：US20170353157A1

公开(公告)日：2017-12-07

申请号：US15173044

申请日：2016-06-03

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava ,  Madhulatha Bonu

IPC: H03B5/04 ,  H03B5/06 ,  H03B5/12 ,  H03L7/00

CPC classification number: H03B5/06 ,  H03B5/04 ,  H03B5/1221 ,  H03B5/1234 ,  H03L3/00 ,  H03L7/00

Abstract: Methods and apparatus are disclosed to generate an oscillating output signal having a voltage swing greater than a voltage swing across nodes of active devices. An example oscillator includes a tank to generate an oscillating output signal in response receiving an edge of an enable signal; a feedback generator including a first gain stage forming a first feedback loop with the tank, the first feedback loop providing a first charge to maintain the oscillating output signal and a second gain stage forming a second feedback loop with the tank, the second feedback loop providing a second charge to maintain the oscillating output signal, the first and second charges combining with the oscillating output signal to generate a high voltage swing; and an attenuator connected between the tank and the feedback generator to isolate the tank from active components of the feedback generator.

公开(公告)号：US09601995B1

公开(公告)日：2017-03-21

申请号：US15145775

申请日：2016-05-03

Applicant: Texas Instruments Incorporated

Inventor： Subhashish Mukherjee ,  Kumar Anurag Shrivastava

IPC: G01R19/00 ,  H02M3/07 ,  H03K3/0233 ,  H03K17/22

CPC classification number: H03K3/02337 ,  G01R19/04 ,  H03K9/02

Abstract: A low power radio frequency envelope detector includes a charging transistor for controlling the charge supplied to an output capacitor. A first input capacitor couples an input signal to a gate of the charging transistor. A second input capacitor couples a first polarity of the input signal to a first diode such that the first diode is operable to couple charge to the first input capacitor and to the gate of the charging transistor in response to a positive excursion of the first polarity of the input signal. A third input capacitor couples a second polarity of the input signal to a second diode coupled in series with the first diode. The first and second diodes are operable to couple charge to the first input capacitor and to the gate of the charging transistor in response to a positive excursion of the first polarity of the input signal.

公开(公告)号：US12267055B2

公开(公告)日：2025-04-01

申请号：US18179482

申请日：2023-03-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kumar Anurag Shrivastava

IPC: H03H11/02 ,  H03K5/01 ,  H03K19/21 ,  H03K5/00

Abstract: In some examples, an apparatus includes an isolating transformer and a grounding circuit. The isolating transformer has first and second coils separated by an isolation barrier, the first coil having first and second terminals. The grounding circuit is coupled to the first and second terminals. The grounding circuit is configured to couple the first and second terminals to a ground terminal during a first time period. The grounding circuit is also configured to decouple the first and second terminals from the ground terminal during a second time period.

公开(公告)号：US11863360B2

公开(公告)日：2024-01-02

申请号：US17584099

申请日：2022-01-25

Applicant: Texas Instruments Incorporated

Inventor： Kumar Anurag Shrivastava ,  Siraj Akhtar ,  Swaminathan Sankaran ,  Anant Shankar Kamath

IPC: H03C1/06 ,  H03C1/36 ,  H04L27/04

CPC classification number: H04L27/04 ,  H03C1/06 ,  H03C1/36

Abstract: An example apparatus includes: an on-off keying (OOK) modulator including: a first transistor including a first control terminal; a second transistor including a first current terminal, a second current terminal, and a second control terminal, the first current terminal coupled to the first control terminal; a third transistor including a third current terminal, a fourth current terminal, and a third control terminal, the third current terminal coupled to the first control terminal; a fourth transistor including a fifth current terminal, the fifth current terminal coupled to the second current terminal; and a fifth transistor including a sixth current terminal, the sixth current terminal coupled to the fourth current terminal.