ELECTRONIC DEVICE AND METHOD FOR PROCESSING INPUT ON VIEW LAYERS

    公开(公告)号:US20170212677A1

    公开(公告)日:2017-07-27

    申请号:US15418087

    申请日:2017-01-27

    Abstract: An electronic device and method are provided for processing an input using view layers. The electronic device includes a memory, a display, and a processor. The memory stores a first predetermined condition and a second predetermined condition both of which are used for determining whether an input for one or more displayed view objects is valid. The processor displays the view objects using a first view layer and a second view layer at least partially overlapping with the first view layer, and obtains a user input regarding the displayed view object. If a movement of the user input satisfies the first predetermined condition, the processor processes the user input by using the first view layer. If the movement of the user input satisfies the second predetermined condition, the processor processes the user input by using the second view layer.

    ELECTRONIC DEVICE AND OPERATION METHOD OF ELECTRONIC DEVICE FOR PERFORMING CALCULATION USING ARTIFICIAL INTELLIGENCE MODEL

    公开(公告)号:US20240289654A1

    公开(公告)日:2024-08-29

    申请号:US18599852

    申请日:2024-03-08

    CPC classification number: G06N5/04

    Abstract: An electronic device is provided. The electronic device includes memory storing artificial intelligence models and one or more programs including instructions, and one or more processor, wherein the one or more programs including instructions, when executed by the one or more processors, cause the electronic device to load the artificial intelligence models stored in memory and execute a runtime engine of a framework, identify whether an operation function is supported on a target processor, identify whether a first node for executing an inference on the artificial intelligence models operate without errors based on supporting the operation function on the target processor, repeat the identification until a last node by adding one more nodes in case that the first node operates without errors, form a first group by creating a partition from the first node to an identified N−1st node based on the identification that an error occurred on an Nth node, and form a second group by creating a partition for the Nth node on which the error occurred.

    ELECTRONIC DEVICE FOR SEAMLESSLY DISPLAYING IMAGES, AND OPERATING METHOD THEREFOR

    公开(公告)号:US20220214850A1

    公开(公告)日:2022-07-07

    申请号:US17703347

    申请日:2022-03-24

    Abstract: An electronic device is provided. The electronic device includes a first display disposed on a first surface of the electronic device, a second display disposed on a second surface of the electronic device and having at least a portion thereof being unviewable to a user according to a folding state of the electronic device, a memory configured to store instructions, and a processor electrically connected to the first display, the second display, and the memory. The processor is configured to execute the instructions to detect a change in the folding state of the electronic device while displaying a first image on one of the first display or the second display, when the change in the folding state is detected, generate a second image to be displayed on the other of the first display or the second display, while generating the second image, store a snapshot image of the first image in the memory and display the snapshot image on the other of the first display or the second display, and when the second image is generated, display the second image on the other of the first display or the second display instead of the snapshot image.

    CRYSTAL OSCILLATOR REDUCING PHASE NOISE AND SEMICONDUCTOR CHIP INCLUDING THE SAME

    公开(公告)号:US20220094302A1

    公开(公告)日:2022-03-24

    申请号:US17340593

    申请日:2021-06-07

    Abstract: A crystal oscillator reducing phase noise and a semiconductor chip including the same are provided. The crystal oscillator includes a transconductance circuit electrically connected to a crystal, a load capacitor connected to the transconductance circuit, a feedback resistance circuit connected between an input terminal of the transconductance circuit and an output terminal of the transconductance circuit, the feedback resistance circuit configured to provide a feedback resistance, and a variable resistance controller configured to generate a resistance control signal for controlling the feedback resistance, the resistance control signal causing the feedback resistance to have a first value in a first period and a second value in a second period, the first value being less than the second value, the first period corresponding to a first portion of a cycle of the clock signal, and the second period corresponding to a second portion of the cycle different from the first portion.

    INTEGRATED CIRCUIT SEMICONDUCTOR DEVICE

    公开(公告)号:US20210134942A1

    公开(公告)日:2021-05-06

    申请号:US16938286

    申请日:2020-07-24

    Abstract: An integrated circuit semiconductor device includes a plurality of cylindrical structures separated from each other on a substrate; and a plurality of supporters having an opening region exposing side surfaces of the plurality of cylindrical structures, the plurality of supporters being in contact with the side surfaces of the plurality of cylindrical structures and supporting the plurality of cylindrical structures, wherein each of the plurality of supporters has both side surfaces having slopes and has a top width that is less than a bottom width.

    NON-LINEAR SPREAD SPECTRUM PROFILE GENERATOR USING LINEAR COMBINATION

    公开(公告)号:US20190199357A1

    公开(公告)日:2019-06-27

    申请号:US16290067

    申请日:2019-03-01

    Abstract: A non-linear spread spectrum clock generator using a linear combination may include a phase locked loop configured to receive a reference signal and generate an output signal according to the reference signal and a feedback signal that compensates for the output signal. The phase locked loop may include a divider configured to generate the feedback signal by dividing the output signal by a divisional ratio. The non-linear spread spectrum clock generator may include a non-linear profile generator configured to generate a non-linear signal by selectively outputting selected ones of a plurality of signals according to the absolute magnitudes of the signals and a delta-sigma modulator configured to receive the outputted linear ramp function and to change the divisional ratio. The signals may vary according to different linear ramp functions. The different ramp functions may include different slopes and initiation time values.

Patent Agency Ranking