公开(公告)号：US11227914B2

公开(公告)日：2022-01-18

申请号：US16776677

申请日：2020-01-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Woo Cheol Shin ,  Sun Wook Kim ,  Seung Min Song ,  Nam Hyun Lee

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/08 ,  H01L29/423 ,  H01L27/092

Abstract: A semiconductor device includes a substrate having a first region and a second region, first and second nanowires disposed sequentially on the substrate in the first region, and extending respectively in a first direction, third and fourth nanowires disposed sequentially on the substrate in the second region, and extending respectively in the first direction, a first inner spacer between the first nanowire and the second nanowire, and including hydrogen of a first hydrogen mole fraction, and a second inner spacer between the third nanowire and the fourth nanowire, and including hydrogen of a second hydrogen mole fraction that is greater than the first hydrogen mole fraction.

公开(公告)号：US20210091232A1

公开(公告)日：2021-03-25

申请号：US16953785

申请日：2020-11-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gil Yang ,  Woo Seok Park ,  Dong Chan Suh ,  Seung Min Song ,  Geum Jong Bae ,  Dong Il Bae

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/10 ,  H01L29/161 ,  H01L29/08 ,  H01L29/66 ,  H01L29/775 ,  B82Y10/00 ,  H01L29/06

Abstract: A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.

公开(公告)号：US10903324B2

公开(公告)日：2021-01-26

申请号：US16205851

申请日：2018-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chang Woo Noh ,  Seung Min Song ,  Geum Jong Bae ,  Dong Il Bae

IPC: H01L29/66 ,  H01L29/417 ,  H01L21/768 ,  H01L29/06 ,  H01L29/78

Abstract: A semiconductor device including a fin field effect transistor (fin-FET) includes active fins disposed on a substrate, isolation layers on both sides of the active fins, a gate structure formed to cross the active fins and the isolation layers, source/drain regions on the active fins on sidewalls of the gate structure, a first interlayer insulating layer on the isolation layers in contact with portions of the sidewalls of the gate structure and portions of surfaces of the source/drain regions, an etch stop layer configured to overlap the first interlayer insulating layer, the sidewalls of the gate structure, and the source/drain regions, and contact plugs formed to pass through the etch stop layer to contact the source/drain regions. The source/drain regions have main growth portions in contact with upper surfaces of the active fins.

公开(公告)号：US10665723B2

公开(公告)日：2020-05-26

申请号：US16161765

申请日：2018-10-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seung Min Song ,  Woo Seok Park ,  Geum Jong Bae ,  Dong Il Bae ,  Jung Gil Yang

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/06 ,  H01L29/423 ,  H01L21/02

Abstract: A semiconductor device includes a substrate; protruding portions extending in parallel to each other on the substrate; nanowires provided on the protruding portions and separated from each other; gate electrodes provided on the substrate and surrounding the nanowires; source/drain regions provided on the protruding portions and sides of each of the gate electrodes, the source/drain regions being in contact with the nanowires; and first voids provided between the source/drain regions and the protruding portions.

公开(公告)号：US10347718B2

公开(公告)日：2019-07-09

申请号：US15877667

申请日：2018-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Gil Yang ,  Dong Il Bae ,  Chang Woo Sohn ,  Seung Min Song ,  Dong Hun Lee

IPC: H01L21/70 ,  H01L29/06 ,  H01L29/66 ,  H01L29/08 ,  H01L21/8238 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/165 ,  H01L29/10 ,  H01L27/092 ,  H01L27/02 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a substrate, a first nanowire spaced apart from a first region of the substrate, a first gate electrode surrounding a periphery of the first nanowire, a second nanowire spaced apart from a second region of the substrate and extending in a first direction and having a first width in a second direction intersecting the first direction, a supporting pattern contacting the second nanowire and positioned under the second nanowire, and a second gate electrode extending in the second direction and surrounding the second nanowire and the supporting pattern.