公开(公告)号：US10127876B2

公开(公告)日：2018-11-13

申请号：US15159721

申请日：2016-05-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kye-uk Lee ,  Kee-bum Park ,  Sihyun Ahn ,  Jaewon Kim ,  Byoungsun Na ,  Yoomi Ra

IPC: G09G3/36 ,  G09G3/20

Abstract: A gate driving circuit includes a plurality of stages, a k-th stage (where k is a natural number) of the plurality of stages being configured to receive a clock signal, a (k−1)-th carry signal from a (k−1)-th stage of the plurality of stages, a (k+1)-th carry signal from a (k+1)-th stage of the plurality of stages, a (k+2)-th carry signal from a (k+2)-th stage of the plurality of stages, a first ground voltage, a second ground voltage, and a third ground voltage, and to output a k-th gate signal and a k-th carry signal, the k-th stage including a first pull down circuit configured to discharge the k-th gate signal as the third ground voltage in response to the (k+1)-th carry signal, and the third ground voltage having a lower voltage level than the first ground voltage and having a higher voltage level than the second ground voltage.

公开(公告)号：US20170084239A1

公开(公告)日：2017-03-23

申请号：US15159721

申请日：2016-05-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Kye-uk Lee ,  Kee-bum Park ,  Sihyun Ahn ,  Jaewon Kim ,  Byoungsun Na ,  Yoomi Ra

IPC: G09G3/36 ,  G09G3/20

CPC classification number: G09G3/3677 ,  G09G3/2003 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2230/00 ,  G09G2310/0286 ,  G09G2320/02 ,  G11C19/28

Abstract: A gate driving circuit includes a plurality of stages, a k-th stage (where k is a natural number) of the plurality of stages being configured to receive a clock signal, a (k−1)-th carry signal from a (k−1)-th stage of the plurality of stages, a (k+1)-th carry signal from a (k+1)-th stage of the plurality of stages, a (k+2)-th carry signal from a (k+2)-th stage of the plurality of stages, a first ground voltage, a second ground voltage, and a third ground voltage, and to output a k-th gate signal and a k-th carry signal, the k-th stage including a first pull down circuit configured to discharge the k-th gate signal as the third ground voltage in response to the (k+1)-th carry signal, and the third ground voltage having a lower voltage level than the first ground voltage and having a higher voltage level than the second ground voltage.

公开(公告)号：US12127448B2

公开(公告)日：2024-10-22

申请号：US17506043

申请日：2021-10-20

Applicant: Samsung Display Co., Ltd.

Inventor： Junwon Choi ,  Jaewon Kim ,  Junyoung Min

IPC: H10K59/126 ,  G09G3/3233 ,  H10K59/131

CPC classification number: H10K59/126 ,  G09G3/3233 ,  H10K59/131 ,  G09G2300/0842

Abstract: A display device includes: pixel circuits defining pixel circuit rows each extending in a first direction and pixel circuit columns each extending in a second direction crossing the first direction; active patterns disposed to correspond to the pixel circuits, respectively; a horizontal diode initialization voltage line which transmits a diode initialization voltage and extends in the first direction; and a vertical diode initialization voltage line extending in the second direction and connected to the horizontal diode initialization voltage line. Each of the active patterns includes first and second diode initialization active regions to which the diode initialization voltage is applied. First active patterns of the plurality of the active patterns corresponding to one of the pixel circuit rows are connected to each other. A first end of one of the first and second diode initialization active regions contact the vertical diode initialization voltage line.

公开(公告)号：US12069896B2

公开(公告)日：2024-08-20

申请号：US17577995

申请日：2022-01-18

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/14 ,  H01L29/786 ,  H10K59/121

CPC classification number: H10K59/1213 ,  H01L29/7869 ,  H10K59/1216

Abstract: A display panel includes a substrate including a first opening and a second opening that are spaced apart from each other, a plurality of pixels located in a display area around the first opening and the second opening, each of the plurality of pixels including a pixel circuit including a first thin-film transistor, and a display element connected to the pixel circuit, a bottom metal layer located between the substrate and the first thin-film transistor, emission control lines located on the substrate, extending in a first direction and spaced apart from each other by the first opening and the second opening, and a first conductive layer located in an intermediate area surrounding each of the first opening and the second opening to bypass the first opening and the second opening.

公开(公告)号：US11778877B2

公开(公告)日：2023-10-03

申请号：US17465193

申请日：2021-09-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/14 ,  H10K59/131 ,  H10K59/65 ,  H10K59/121 ,  H01L29/786 ,  H01L27/12

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/65 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/7869 ,  H01L29/78675

Abstract: A display device includes: a substrate in which a transmission area, a display area, a non-display area and the display area, and a peripheral area are defined; pixels arranged on the display area; initialization gate lines and compensation gate lines extending along pixel rows; gate driving circuits disposed on the peripheral area; and gate connection lines disposed on the non-display area. A k-th gate driving circuit among the gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines and n-th and (n+1)-th compensation gate lines. First portions of the n-th and (n+1)-th compensation gate lines and second portions of the n-th and (n+1)-th compensation gate lines, which are physically apart from each other by the transmission area, are electrically connected to each other through a first gate connection line among gate connection lines.

公开(公告)号：US11727879B2

公开(公告)日：2023-08-15

申请号：US17897202

申请日：2022-08-28

Applicant: Samsung Display Co., Ltd.

Inventor： Jun-yong An ,  Jaewon Kim ,  Hyunae Park ,  Hyungjun Park ,  Seungwoo Sung ,  Young-soo Yoon ,  Ji-eun Lee ,  Yun-kyeong In ,  Donghyeon Jang ,  Junyoung Jo

IPC: G09G5/00 ,  G09G3/3233 ,  H10K59/131

CPC classification number: G09G3/3233 ,  H10K59/131 ,  G09G2300/0426

Abstract: A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.

公开(公告)号：US20230020515A1

公开(公告)日：2023-01-19

申请号：US17577995

申请日：2022-01-18

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/32 ,  H01L29/786

Abstract: A display panel includes a substrate including a first opening and a second opening that are spaced apart from each other, a plurality of pixels located in a display area around the first opening and the second opening, each of the plurality of pixels including a pixel circuit including a first thin-film transistor, and a display element connected to the pixel circuit, a bottom metal layer located between the substrate and the first thin-film transistor, emission control lines located on the substrate, extending in a first direction and spaced apart from each other by the first opening and the second opening, and a first conductive layer located in an intermediate area surrounding each of the first opening and the second opening to bypass the first opening and the second opening.

公开(公告)号：US11450277B2

公开(公告)日：2022-09-20

申请号：US17409234

申请日：2021-08-23

Applicant: Samsung Display Co., Ltd.

Inventor： Jun-yong An ,  Jaewon Kim ,  Hyunae Park ,  Hyungjun Park ,  Seungwoo Sung ,  Young-soo Yoon ,  Ji-eun Lee ,  Yun-kyeong In ,  Donghyeon Jang ,  Junyoung Jo

IPC: G09G5/00 ,  G09G3/3233 ,  H01L27/32

Abstract: A display device includes: a display panel in which a non-display region and a display region surrounding the non-display region are defined, wherein the display panel includes: a base layer comprising a first region in which a hole is defined corresponding to the non-display region, a second region surrounding the first region, and a third region corresponding to the display region; and first signal line parts disposed on the second region and the third region, the first signal line parts arrayed spaced apart from each other in a first direction, and each of the first signal line parts includes: a first line; a second line spaced apart from the first line; and a first connection part configured to connect the first line and the second line.

公开(公告)号：US11251235B2

公开(公告)日：2022-02-15

申请号：US16698864

申请日：2019-11-27

Applicant: Samsung Display Co., Ltd.

Inventor： Youngsoo Yoon ,  Jaewon Kim ,  Hyunae Park ,  Hyungjun Park ,  Seungwoo Sung ,  Nuree Um ,  Ilgoo Youn ,  Jieun Lee ,  Donghyeon Jang ,  Seunghan Jo

IPC: G09G3/3233 ,  H01L27/32

Abstract: A display panel may include a substrate, pixels, dummy pixels, and voltage lines. The substrate may include a first transmission region for light transmission and/or sound transmission, a non-display area surrounding the first transmission region, and a display area surrounding the non-display area. The pixels may be arranged on the display area and may emit light. The dummy pixels may be arranged on the non-display area, may include a first dummy pixel, and may emit no light. The voltage lines may transmit voltages to the pixels and the dummy pixels. The voltage lines may include a first voltage line and a second voltage line. The first voltage line may be spaced from the second voltage line, may be aligned with the second voltage line, and may overlap the first dummy pixel. The first transmission region may be positioned between the first voltage line and the second voltage line.

公开(公告)号：US11114523B2

公开(公告)日：2021-09-07

申请号：US16687917

申请日：2019-11-19

Applicant: Samsung Display Co., Ltd.

Inventor： Hyunae Park ,  Jaewon Kim ,  Seungwoo Sung ,  Jun-yong An ,  Nuree Um ,  Ji-eun Lee ,  Yun-kyeong In ,  Donghyeon Jang ,  Seunghan Jo ,  Junyoung Jo

IPC: G09G3/32 ,  H01L27/32 ,  G09G3/3225 ,  G09G3/3266 ,  H01L51/52 ,  H01L27/12

Abstract: A display panel includes a first panel region (FPR) including (n−1)-th and n-th pixel rows ((n−1)PR and nPR), and a second panel region (SPR) dividing the nPR to propagate an optical signal. The display panel includes a circuit element layer (CEL) and a display element layer (DEL). The CEL includes a signal line (SL), a pixel driving circuit (PDC), and first to third regions. The SL and the PDC are in the first region. The second region (SR) corresponds to the SPR. The SL and the PDC are not in the SR. The third region (TR) corresponds to the SPR and is along a periphery of the SR. The SL is in the TR, and includes an (n−1)-th scan line ((n−1)SL) connected to the (n−1)PR, an n-th reset line (nRL) connected to the nPR, and a first row connection line in the TR and connecting the (n−1)SL and the nRL.