公开(公告)号：US20240206229A1

公开(公告)日：2024-06-20

申请号：US18370796

申请日：2023-09-20

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Junyong An ,  Junwon Choi ,  Chulkyu Kang ,  Sujin Kim ,  Seonkyoon Mok

IPC: H10K59/121 ,  H10K59/131

CPC classification number: H10K59/1213 ,  H10K59/1216 ,  H10K59/131

Abstract: A display apparatus includes: a substrate; a driving transistor over the substrate, and including a semiconductor layer including a driving active area; a driving voltage line between the substrate and the semiconductor layer, and extending in a first direction; a first capacitor including a first capacitor electrode at the same layer as that of the driving voltage line, and a second capacitor electrode at the same layer as that of the semiconductor layer; and a second capacitor including a third capacitor electrode at the same layer as that of the semiconductor layer, and a fourth capacitor electrode as a part of the driving voltage line.

公开(公告)号：US20230217706A1

公开(公告)日：2023-07-06

申请号：US17893922

申请日：2022-08-23

Applicant: Samsung Display Co., Ltd.

Inventor： Junwon Choi ,  Jaewon Kim ,  Junyoung Min

IPC: H01L27/32

CPC classification number: H01L27/3262 ,  H01L27/3265 ,  H01L27/3272 ,  H01L27/3276

Abstract: A display apparatus is disclosed that includes a substrate, an additional transistor, a first wiring, a first insulating layer, and a second wiring. The additional transistor is located on the substrate and includes an additional semiconductor layer and an additional gate electrode. The first wiring is integrally formed with the additional gate electrode and extends in a first direction. The first insulating layer is located on the first wiring. The second wiring is located on the first insulating layer and extends in a second direction intersecting the first direction. The second wiring is connected to a source region and a drain region of the additional semiconductor layer.

公开(公告)号：US20240324348A1

公开(公告)日：2024-09-26

申请号：US18531709

申请日：2023-12-07

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Soongi Kwon ,  Minwoo Byun ,  Junwon Choi ,  Junyong An

IPC: H10K59/131 ,  G09G3/3233

CPC classification number: H10K59/131 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/08

Abstract: A display apparatus includes a substrate including a display area and a peripheral area outside the display area, a power supply line arranged in the peripheral area, a gate driving circuit arranged between the power supply line and the display area and including a plurality of stages arranged in a direction, and a signal line arranged in the peripheral area, electrically connected to a first stage from among the plurality of stages of the gate driving circuit, and configured to transmit a start signal, wherein the signal line overlaps the power supply line in a plan view and is arranged between the substrate and the power supply line.

公开(公告)号：US20220059637A1

公开(公告)日：2022-02-24

申请号：US17186865

申请日：2021-02-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junwon Choi ,  Jaesic Lee ,  Jaewon Kim ,  Junyoung Min ,  Jinhee Jang

IPC: H01L27/32

Abstract: A display apparatus includes first initialization voltage lines extending in a first direction, second initialization voltage lines extending in the first direction, first initialization connection lines extending in a second direction intersecting the first direction and electrically connecting the first initialization voltage lines to each other, second initialization connection lines extending in the second direction and electrically connecting the second initialization voltage lines to each other, and pixels connected to the first initialization voltage lines, the second initialization voltage lines, the first initialization connection lines and the second initialization connection lines.

公开(公告)号：US20240414943A1

公开(公告)日：2024-12-12

申请号：US18809297

申请日：2024-08-19

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H10K59/121 ,  H01L29/786

Abstract: A display panel includes a substrate including a first opening and a second opening that are spaced apart from each other, a plurality of pixels located in a display area around the first opening and the second opening, each of the plurality of pixels including a pixel circuit including a first thin-film transistor, and a display element connected to the pixel circuit, a bottom metal layer located between the substrate and the first thin-film transistor, emission control lines located on the substrate, extending in a first direction and spaced apart from each other by the first opening and the second opening, and a first conductive layer located in an intermediate area surrounding each of the first opening and the second opening to bypass the first opening and the second opening.

公开(公告)号：US20230232683A1

公开(公告)日：2023-07-20

申请号：US18153885

申请日：2023-01-12

Applicant: Samsung Display Co., Ltd.

Inventor： Jaewon Kim ,  Junyoung Min ,  Junwon Choi ,  Okkyung Park ,  Changsoo Pyon

IPC: H10K59/131 ,  H10K59/121

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/1216

Abstract: A display apparatus includes substrate a semiconductor layer on the substrate, and having a semiconductor pattern, a first conductive layer on the semiconductor layer, and including a first wiring that extends in a first direction, a second wiring that protrudes from the first wiring in a second direction crossing the first direction, and a driving gate electrode, and a second conductive layer on the first conductive layer, and including a first electrode that overlaps the driving gate electrode, wherein the semiconductor pattern includes a first pattern that extends in the first direction and overlaps the second wiring, and a second pattern that extends in the second direction and overlaps the first wiring, and wherein the first electrode includes a protruding electrode that overlaps at least part of the first pattern and at least part of the second pattern.

公开(公告)号：US20220208929A1

公开(公告)日：2022-06-30

申请号：US17465193

申请日：2021-09-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/32

Abstract: A display device includes: a substrate in which a transmission area, a display area, a non-display area and the display area, and a peripheral area are defined; pixels arranged on the display area; initialization gate lines and compensation gate lines extending along pixel rows; gate driving circuits disposed on the peripheral area; and gate connection lines disposed on the non-display area. A k-th gate driving circuit among the gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines and n-th and (n+1)-th compensation gate lines. First portions of the n-th and (n+1)-th compensation gate lines and second portions of the n-th and (n+1)-th compensation gate lines, which are physically apart from each other by the transmission area, are electrically connected to each other through a first gate connection line among gate connection lines.

公开(公告)号：US12127448B2

公开(公告)日：2024-10-22

申请号：US17506043

申请日：2021-10-20

Applicant: Samsung Display Co., Ltd.

Inventor： Junwon Choi ,  Jaewon Kim ,  Junyoung Min

IPC: H10K59/126 ,  G09G3/3233 ,  H10K59/131

CPC classification number: H10K59/126 ,  G09G3/3233 ,  H10K59/131 ,  G09G2300/0842

Abstract: A display device includes: pixel circuits defining pixel circuit rows each extending in a first direction and pixel circuit columns each extending in a second direction crossing the first direction; active patterns disposed to correspond to the pixel circuits, respectively; a horizontal diode initialization voltage line which transmits a diode initialization voltage and extends in the first direction; and a vertical diode initialization voltage line extending in the second direction and connected to the horizontal diode initialization voltage line. Each of the active patterns includes first and second diode initialization active regions to which the diode initialization voltage is applied. First active patterns of the plurality of the active patterns corresponding to one of the pixel circuit rows are connected to each other. A first end of one of the first and second diode initialization active regions contact the vertical diode initialization voltage line.

公开(公告)号：US12069896B2

公开(公告)日：2024-08-20

申请号：US17577995

申请日：2022-01-18

Applicant: Samsung Display Co., Ltd.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/14 ,  H01L29/786 ,  H10K59/121

CPC classification number: H10K59/1213 ,  H01L29/7869 ,  H10K59/1216

Abstract: A display panel includes a substrate including a first opening and a second opening that are spaced apart from each other, a plurality of pixels located in a display area around the first opening and the second opening, each of the plurality of pixels including a pixel circuit including a first thin-film transistor, and a display element connected to the pixel circuit, a bottom metal layer located between the substrate and the first thin-film transistor, emission control lines located on the substrate, extending in a first direction and spaced apart from each other by the first opening and the second opening, and a first conductive layer located in an intermediate area surrounding each of the first opening and the second opening to bypass the first opening and the second opening.

公开(公告)号：US11778877B2

公开(公告)日：2023-10-03

申请号：US17465193

申请日：2021-09-02

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Junyoung Min ,  Jaewon Kim ,  Junwon Choi

IPC: H01L27/14 ,  H10K59/131 ,  H10K59/65 ,  H10K59/121 ,  H01L29/786 ,  H01L27/12

CPC classification number: H10K59/131 ,  H10K59/1213 ,  H10K59/65 ,  H01L27/124 ,  H01L27/1225 ,  H01L27/1251 ,  H01L29/7869 ,  H01L29/78675

Abstract: A display device includes: a substrate in which a transmission area, a display area, a non-display area and the display area, and a peripheral area are defined; pixels arranged on the display area; initialization gate lines and compensation gate lines extending along pixel rows; gate driving circuits disposed on the peripheral area; and gate connection lines disposed on the non-display area. A k-th gate driving circuit among the gate driving circuits simultaneously drives m-th and (m+1)-th initialization gate lines and n-th and (n+1)-th compensation gate lines. First portions of the n-th and (n+1)-th compensation gate lines and second portions of the n-th and (n+1)-th compensation gate lines, which are physically apart from each other by the transmission area, are electrically connected to each other through a first gate connection line among gate connection lines.