公开(公告)号：US20130207245A1

公开(公告)日：2013-08-15

申请号：US13765183

申请日：2013-02-12

Applicant: Renesas Electronics Corporation

Inventor： Naoya INOUE ,  Masayoshi TAGAMI

IPC: H01L21/768 ,  H01L23/532

CPC classification number: H01L21/76825 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02274 ,  H01L21/02348 ,  H01L21/7682 ,  H01L23/53238 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Low-k porous insulating films with a high modulus of elasticity are made by depositing alkylated cyclic siloxane precursors over a semiconductor substrate by CVD. Plasma enhancement of the CVD is performed either during CVD or in situ on the deposited film. A UV cure of the film is effected under controlled temperature and time conditions, which generates a tight bonding structure between adjacent ring moieties without disrupting the Si—O ring bonding.

Abstract translation: 通过CVD在半导体衬底上沉积烷基化的环状硅氧烷前体来制备具有高弹性模量的低k多孔绝缘膜。 在CVD期间或在沉积膜上原位进行CVD的等离子体增强。 膜的UV固化在受控的温度和时间条件下进行，其在相邻环部分之间产生紧密的结合结构，而不破坏Si-O环键合。

公开(公告)号：US20130200363A1

公开(公告)日：2013-08-08

申请号：US13738137

申请日：2013-01-10

Applicant: Renesas Electronics Corporation

Inventor： Hiroshi SUNAMURA ,  Naoya INOUE ,  Kishou KANEKO

IPC: H01L27/105

CPC classification number: H01L29/7869 ,  H01L23/53228 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/092 ,  H01L27/101 ,  H01L27/105 ,  H01L27/1082 ,  H01L27/10873 ,  H01L27/10894 ,  H01L27/10897 ,  H01L27/1104 ,  H01L27/1108 ,  H01L27/1116 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11526 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11582 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/2436 ,  H01L29/22 ,  H01L29/24 ,  H01L29/7889 ,  H01L29/7926 ,  H01L2924/0002 ,  H01L2924/00

Abstract: There is provided a readily manufacturable semiconductor device including two transistors having mutually different characteristics. The semiconductor device includes a substrate, a multilayer wiring layer disposed over the substrate, a first transistor disposed in the multilayer wiring layer, and a second transistor disposed in a layer different from a layer including the first transistor disposed therein of the multilayer wiring layer, and having different characteristics from those of the first transistor. This can provide a readily manufacturable semiconductor device including two transistors having mutually different characteristics.

Abstract translation: 提供了包括具有相互不同特性的两个晶体管的容易制造的半导体器件。 半导体器件包括衬底，设置在衬底上的多层布线层，设置在多层布线层中的第一晶体管，以及设置在不同于布置在多层布线层中的第一晶体管的层的层中的第二晶体管， 并具有与第一晶体管不同的特性。 这可以提供包括具有相互不同特性的两个晶体管的容易制造的半导体器件。

公开(公告)号：US20130153887A1

公开(公告)日：2013-06-20

申请号：US13680757

申请日：2012-11-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kishou KANEKO ,  Naoya INOUE ,  Yoshihiro HAYASHI

IPC: H01L27/088 ,  H01L29/66

CPC classification number: H01L27/1259 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02565 ,  H01L21/28 ,  H01L21/44 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/522 ,  H01L27/088 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/66477 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.

Abstract translation: 形成层间绝缘膜。 然后将第一栅电极和第二栅电极埋入层间绝缘膜中。 然后，在层间绝缘膜上方，在第一栅电极上方和第二栅电极上形成防扩散膜。 然后，在存在于第一栅电极上的抗扩散膜上形成第一半导体层。 然后，在第一半导体层的上表面和横向侧上以及反扩散膜之上形成绝缘覆盖膜。 然后，在绝缘覆盖膜上形成半导体膜。 然后，选择性地去除半导体膜以留下位于第二栅电极上的部分，从而形成第二半导体层。