Abstract:
Systems, methods, and apparatus for improving latency of a serial bus are described. A method performed at a device coupled to a serial bus includes writing a first data byte received in a first field of a datagram from a serial bus to a first register in the slave device, modifying the address pointer by adding or subtracting a stride value provided in a second field of the datagram to obtain a modified address pointer, and writing a second data byte received in a third field of the datagram to a second register in the slave device. The first register may be located at an address indicated by an address pointer and the second register may be located at an address indicated by the modified address pointer. The first register and the second register may be located at non-contiguous addresses.
Abstract:
Systems, methods, and apparatus are described that enable a serial bus to be operated in one or more modes that employ additional wires for communicating data. A method includes providing a data payload for a data frame to be transmitted over a plurality of data lanes of a multilane serial bus, providing a preamble to precede the data payload in transmission over the multilane serial bus, configuring one or more repurposed bit fields in the data frame to indicate that a multi-bit cyclic redundancy check is provided in the data frame, and transmitting the data frame over the multilane serial bus in accordance with a clock signal transmitted on a clock lane of the multilane serial bus. At least one bit of the multi-bit cyclic redundancy check is transmitted on two or more data lanes of the plurality of data lanes.
Abstract:
Systems, methods, and apparatus for communication virtualized general-purpose input/output (GPIO) signals over a serial communication link. A method performed at a device coupled to a serial bus includes determining that GPIO state information corresponding to a physical GPIO pin or signal is available in an event register that has a first bit width and includes information identifying one or more devices associated with the event register, and exchanging the GPIO state information with the one or more devices over the serial bus. The GPIO state information may be transmitted over the serial bus in accordance with configuration information stored in the event register. The configuration information may include an address identifying the one or more devices. The configuration information may include addressing information identifying a target register in the one or more devices. The configuration information may include information identifying a mode of communication for transmitting the GPIO state information.
Abstract:
Systems, apparatus, methods and techniques that can provide optimized low-latency communications between different devices such that GPIO signals may be carried as virtual signals. A virtual GPIO finite state machine in a first device is provided that can consolidate GPIO-related events by initiating a wait period after a first-occurring event and that has a duration selected to permit one or more later-occurring events to be detected before transmission of virtual GPIO data over a data communication bus to a second device. One method may include initiating a wait period after detecting a first change in GPIO state, refraining from transmitting virtual GPIO data during the wait period, detecting occurrence of a second change in GPIO state during the wait period, and transmitting virtual GPIO data corresponding to the first and second changes in GPIO state over the serial bus after the wait period has expired.
Abstract:
Systems and methods are disclosed for optimizing the reach of a message beacon device. The method may include identifying a plurality of transceivers associated with the message beacon device, analyzing each identified transceiver on the basis of a resource consumption associated with the identified transceiver, an interference of the identified transceiver with a different transceiver of the plurality of identified transceivers, a reach of the identified transceiver, or a combination thereof, selecting a transmission set from the plurality of identified transceivers based on the analysis of each identified transceiver, and transmitting a message beacon using each selected transceiver in the transmission set.
Abstract:
Systems and methods are disclosed for improving coexistence among wireless devices. A method may include detecting interference on a first radio access technology (RAT) channel, initiating a discovery protocol to identify a proximate wireless device in response to the detecting, establishing a wireless communication connection with the proximate wireless device, requesting radio configuration information and radio change capability information from the proximate wireless device, receiving the radio configuration information and the radio change capability information, and attempting to mitigate interference based on the radio configuration information and the radio change capability information received from the proximate wireless device.
Abstract:
A mobile wireless device/platform dynamically selects or instantiates a desired interface to improve conditions related to the mobile (multi-radio) wireless device, such as power consumption savings, radio coexistence mitigation, electromagnetic interference (EMI) reduction, etc. In one instance, the mobile wireless device identifies one or more hardware interfaces in a mobile wireless device host. The mobile wireless device then dynamically selects the one or more hardware interfaces to facilitate communication between a peripheral device and the mobile wireless device host.
Abstract:
A method for managing a plurality of imaging devices in a vehicle includes determining that a change of data security mode is indicated for frames of image data transmitted over a first data communication link, determining whether a sensor management system has sufficient processing capacity to support the change of data security mode, increasing the processing capacity of the sensor management system by modifying data security settings for at least one other data communication link when the processing capacity of the sensor management system is insufficient to support the change of data security mode, and initiating the change of data security mode when the sensor management system has sufficient processing capacity to support the change of data security mode. The change of data security mode may include a change from an application-based to a link-based data security mode or a change from the link-based to the application-based data security mode.
Abstract:
A receiving circuit has a clock generator circuit, a synchronization circuit and a controller. The clock generator circuit is configured to generate a base clock signal with a base frequency. The synchronization circuit is configured to synchronize edges in the base clock signal with edges in a Manchester-encoded data signal received over a serial bus. The controller is configured to detect that a first pulse received from the serial bus has a duration corresponding to a pulse duration defined for a first type of sequence start condition that indicates a first type of transaction during which the Manchester-encoded data signal is received over the serial bus; configure a first timer to expire after a first timeout period; and ignore the first pulse when signaling consistent with the first type of sequence start condition has not been received before the first timer expires.
Abstract:
Systems, methods, and apparatus increase the number of slave devices that can be connected to a serial bus. The bus protocol may be an RFFE protocol, an SPMI protocol, an I3C protocol or another protocol usable on a serial bus. In various aspects of the disclosure, a method performed at a device coupled to a serial bus includes receiving a first datagram at a slave device coupled to a serial bus, where the first datagram includes a 4-bit broadcast address indicative of a broadcast datagram, a first command directed to an invalid register address, and a payload, determining an encapsulation protocol associated with the invalid register address, and responding to a second command carried in the payload when an 8-bit slave address in the payload matches an 8-bit slave identifier allocated to the slave device.