公开(公告)号：US10592441B2

公开(公告)日：2020-03-17

申请号：US15960356

申请日：2018-04-23

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee Mishra ,  Christopher Kong Yee Chun ,  Richard Dominic Wietfeldt ,  Mohit Kishore Prasad

IPC: G06F13/16 ,  G06F13/42

Abstract: Systems, methods, and apparatus for communicating datagrams over a serial communication link are provided. A receiving device captures a sending device address during bus arbitration and receives a datagram subsequent to the bus arbitration. The datagram includes at least a register address and a payload. The receiving device obtains an address region specific to the sending device within a register space of the receiving device based on the captured sending device address and the register address included in the datagram and writes the payload of the datagram to the register space according to the obtained address region.

公开(公告)号：US10467154B2

公开(公告)日：2019-11-05

申请号：US15864871

申请日：2018-01-08

Applicant: QUALCOMM Incorporated

Inventor： Lalan Jee Mishra ,  Richard Dominic Wietfeldt ,  Christopher Kong Yee Chun ,  Mohit Prasad ,  Chris Rosolowski

IPC: G06F13/12 ,  G06F13/364 ,  G06F13/40 ,  G06F13/42 ,  G06F15/78

Abstract: Systems, methods, and apparatus for communication virtualized general-purpose input/output signals over a serial communication link A method performed at a transmitting device coupled to a communication link includes configuring general-purpose input/output (GPIO) state from a plurality of sources into a virtual general-purpose input/output word, identifying one or more destinations for the first GPIO word based on a mapping of the GPIO state to one or more devices coupled to a serial bus, and transmitting the first GPIO word to each destination.

公开(公告)号：US20190188175A1

公开(公告)日：2019-06-20

申请号：US15849459

申请日：2017-12-20

Applicant: Qualcomm Incorporated

Inventor： Christopher Kong Yee Chun ,  Chris Rosolowski

IPC: G06F13/40 ,  G06F13/364 ,  G06F13/42 ,  G06F13/38

Abstract: An integrated circuit includes a processor to monitor a communication interface arbitration sequence on a system bus, determine, based on the monitored arbitration sequence, a master or slave identifier that is sending a transaction on the system bus, and process the transaction based on the determined master or slave identifier that is sending the transaction.

公开(公告)号：US20180357192A1

公开(公告)日：2018-12-13

申请号：US15618062

申请日：2017-06-08

Applicant: QUALCOMM INCORPORATED

Inventor： Christopher Kong Yee Chun ,  Chris Rosolowski

IPC: G06F13/364 ,  G06F13/40 ,  G06F1/26 ,  G06F3/06

CPC classification number: G06F13/364 ,  G06F1/26 ,  G06F3/0659 ,  G06F13/404 ,  G06F13/4282

Abstract: Systems and methods are disclosed resetting a slave identification (SID) of an integrated circuit (IC). An exemplary method comprises determining that a plurality of ICs in communication with a shared bus have the same SID, the shared bus operating in a master/slave configuration. A common memory address of the ICs is identified, where data stored in the common memory address is different for a first IC and a second IC. Each of the ICs receives over the shared bus a new SID value and match data. The ICs compare the match data with the data stored in the common memory address. If the match data is the same as the data in the common memory address, the SID is changed the received new SID value.

公开(公告)号：US09900056B2

公开(公告)日：2018-02-20

申请号：US14049724

申请日：2013-10-09

Applicant: QUALCOMM Incorporated

Inventor： Christopher Kong Yee Chun ,  Shadi Hawawini

IPC: H04B5/00 ,  H02J50/60 ,  H02J50/40 ,  H02J50/12 ,  H02J7/02 ,  H02J5/00 ,  H02J50/80

CPC classification number: H04B5/0037 ,  H02J5/00 ,  H02J5/005 ,  H02J7/02 ,  H02J7/025 ,  H02J50/12 ,  H02J50/40 ,  H02J50/60 ,  H02J50/80

Abstract: A system and method providing for delayed initialization of a device in a wireless charging environment. In certain aspects, a device is configured to detect power wirelessly received from a power transmitter. The device may further wirelessly transmit a message to the power transmitter in response to the received power, further determining that a power level of the received power has been adjusted in response to the message. In response to the determining the power level has been adjusted, a controller that is powered by the adjusted power level may be initialized.

公开(公告)号：US09086877B2

公开(公告)日：2015-07-21

申请号：US13668764

申请日：2012-11-05

Applicant: QUALCOMM Incorporated

Inventor： Steven S. Thomson ,  Ali Iranli ,  Michael J. Drop ,  Vinodh R. Cuppu ,  Christopher Kong Yee Chun ,  Tao Xue ,  Haw-Jing Lo ,  Moinul H. Khan

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: Devices and methods for monitoring one or more central processing units in real time are disclosed. The method may include monitoring state data associated with the one or more CPUs in real-time, filtering the state data, and at least partially based on filtered state data, selectively altering one or more system settings. A device may include means for monitoring state data associated with the one or more CPUs in real-time, means for filtering the state data, and means for selectively altering one or more system settings at least partially based on filtered state data. A device may also include a sub-sampling circuit configured to receive a hardware core signal from the central processing unit and output a central processing unit state indication, and an infinite impulse response filter connected to the sub-sampling circuit and configured to receive the central processing unit state indication from the sub-sampling circuit.

Abstract translation: 公开了实时监控一个或多个中央处理单元的装置和方法。 该方法可以包括：实时地监视与一个或多个CPU相关联的状态数据，过滤状态数据，并且至少部分地基于经过滤的状态数据，选择性地改变一个或多个系统设置。 设备可以包括用于实时监视与一个或多个CPU相关联的状态数据的装置，用于过滤状态数据的装置，以及用于至少部分地基于经过滤的状态数据选择性地改变一个或多个系统设置的装置。 设备还可以包括子采样电路，其被配置为从中央处理单元接收硬件核心信号并输出​​中央处理单元状态指示，以及无限脉冲响应滤波器，连接到子采样电路并被配置为接收中央 来自子采样电路的处理单元状态指示。