公开(公告)号：US20170105011A1

公开(公告)日：2017-04-13

申请号：US15210903

申请日：2016-07-15

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Tung-Hsing Wu ,  Han-Liang Chou

IPC: H04N19/186 ,  H04N19/70 ,  H04N19/44 ,  H04N19/182

CPC classification number: H04N19/176 ,  H04N19/103 ,  H04N19/136

Abstract: A method and apparatus of coding using multiple coding modes with multiple color spaces are provided. For the encoder side, a coding mode is selected from a coding mode group. A corresponding color domain is associated with the coding mode and the corresponding color domain is selected from a color-domain group including at least two different color domains. The current coding unit is then encoded in the corresponding color domain using the coding mode. Furthermore, the syntax of the corresponding color domain is signaled in current coding unit syntaxes. The different color domains may include RGB color domain and YCoCg color domain. According to another method, if the midpoint prediction (MPP) mode is selected, a current block is color transformed into another color domain and the MPP coding process is performed in said another color domain.

公开(公告)号：US20160154583A1

公开(公告)日：2016-06-02

申请号：US14905970

申请日：2015-06-16

Applicant: MEDIATEK INC.

Inventor： Kun-Bin Lee ,  Tung-Hsing Wu ,  Yi-Hao Wu

IPC: G06F3/06 ,  G06F13/16

CPC classification number: G06F3/061 ,  G06F3/0631 ,  G06F3/0644 ,  G06F3/0673 ,  G06F5/00 ,  G06F13/1689 ,  Y02D10/14

Abstract: A data processing apparatus includes a storage element and a clock controller. The storage element has storage partitions, including a first storage partition and a second storage partition. The clock controller controls clock driving of the first storage partition and the second storage partition. When a processing circuit is configured to operate in a first condition to process a first data sample with a first bit width, the clock controller enables clock driving of both of the first storage partition and the second storage partition. When the processing circuit is configured to operate in a second condition to process a second data sample with a second bit width, the clock controller enables clock driving of the first storage partition and disables clock driving of the second storage partition.

Abstract translation: 数据处理装置包括存储元件和时钟控制器。 存储元件具有存储分区，包括第一存储分区和第二存储分区。 时钟控制器控制第一存储分区和第二存储分区的时钟驱动。 当处理电路被配置为在第一条件下操作以处理具有第一位宽度的第一数据样本时，时钟控制器启用第一存储分区和第二存储分区两者的时钟驱动。 当处理电路被配置为在第二状态下操作以处理具有第二位宽度的第二数据样本时，时钟控制器使得能够进行第一存储分区的时钟驱动并禁止第二存储分区的时钟驱动。

公开(公告)号：US20160119642A1

公开(公告)日：2016-04-28

申请号：US14887317

申请日：2015-10-19

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Han-Liang Chou ,  Ting-An Lin

IPC: H04N19/59 ,  H04N19/176 ,  H04N19/426 ,  H04N19/172

CPC classification number: H04N19/59 ,  H04N19/105 ,  H04N19/167 ,  H04N19/172 ,  H04N19/176 ,  H04N19/426 ,  H04N19/503 ,  H04N19/53

Abstract: An encoding method includes applying a search range constraint on a search range of a block in a current frame, and encoding the block in the current frame with pixel information in a reference frame according to inter prediction performed based on the search range of the block in the current frame, wherein a resolution of the current frame is different from a resolution of the reference frame.

Abstract translation: 编码方法包括对当前帧中的块的搜索范围应用搜索范围约束，并且根据基于块的搜索范围进行的帧间预测对参考帧中的像素信息对当前帧中的块进行编码 当前帧，其中当前帧的分辨率不同于参考帧的分辨率。

公开(公告)号：US20160014415A1

公开(公告)日：2016-01-14

申请号：US14792634

申请日：2015-07-07

Applicant: Mediatek Inc.

Inventor： Tung-Hsing Wu ,  Han-Liang Chou ,  Kun-Bin Lee

IPC: H04N19/124 ,  H04N19/172 ,  H04N19/176 ,  H04N19/182

CPC classification number: H04N19/124 ,  H04N19/103 ,  H04N19/146 ,  H04N19/167 ,  H04N19/172 ,  H04N19/176 ,  H04N19/182 ,  H04N19/436

Abstract: An encoding method includes following steps: performing a wave-front parallel encoding procedure for encoding pixel data of a frame partition, wherein the frame partition comprises a plurality of block rows, each of the block rows comprises a plurality of blocks, and each of the blocks comprises a plurality of pixels; and imposing constraint on a coding mode selection of a first block of a first block row.

Abstract translation: 编码方法包括以下步骤：执行用于编码帧分区的像素数据的波前并行编码过程，其中所述帧分区包括多个块行，每个块行包括多个块，并且每个 块包括多个像素; 并且对第一块行的第一块的编码模式选择施加约束。

公开(公告)号：US09148672B2

公开(公告)日：2015-09-29

申请号：US13890088

申请日：2013-05-08

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Han-Liang Chou ,  Kun-Bin Lee

IPC: G06K9/36 ,  H04N19/60 ,  H04N19/91 ,  H04N19/61

CPC classification number: H04N19/60 ,  H04N19/619 ,  H04N19/91

Abstract: A method and apparatus for a multiple-channel image/video coding system are disclosed. A residue generation process is applied to the image/video data to generate residue data. A set of integer operations is applied to the residue data across the input channels to generate residue transformed data having multiple output channels. In one embodiment, the residue transformed data associated with a first output channel is related to the difference between a first residue data associated with a first input channel and a second residue data associated with a second input channel. In another embodiment, the residue transformed data associated with a second output channel is related to the second difference between a threshold and a third residue data associated with a third input channel, and wherein the threshold corresponds to the first truncated or rounded average of the first residue data and the second residue data.

Abstract translation: 公开了一种用于多通道图像/视频编码系统的方法和装置。 将残留生成处理应用于图像/视频数据以产生残差数据。 一组整数运算被应用于跨输入通道的残差数据，以产生具有多个输出通道的残差变换数据。 在一个实施例中，与第一输出通道相关联的残余变换数据与与第一输入通道相关联的第一残余数据与与第二输入通道相关联的第二残差数据之间的差异相关。 在另一个实施例中，与第二输出信道相关联的残余变换数据与第三输入信道相关联的阈值与第三残差数据之间的第二差值相关，并且其中阈值对应于第一输入信道的第一截断或舍入平均值 残差数据和第二残差数据。

公开(公告)号：US20140254949A1

公开(公告)日：2014-09-11

申请号：US14198557

申请日：2014-03-05

Applicant: MEDIATEK INC.

Inventor： Han-Liang Chou ,  Tsu-Ming Liu ,  Tung-Hsing Wu ,  Kun-Bin Lee ,  Chi-Cheng Ju

IPC: H04N19/146

CPC classification number: H04N19/146 ,  H04N19/124 ,  H04N19/176

Abstract: An image encoding method with rate control includes at least the following steps: defining a plurality of candidate bit budgets corresponding to different pre-defined maximum encoded bit lengths for one coding unit respectively; when encoding pixel data of a plurality of pixels within a current coding unit of an access unit of a frame, determining a target bit budget selected from the candidate bit budgets and allocating the target bit budget to the current coding unit; and outputting encoded pixel data of the pixels within the current coding unit that is generated from the encoder, wherein a bit length of the encoded pixel data is smaller than or equal to the target bit budget.

Abstract translation: 具有速率控制的图像编码方法至少包括以下步骤：分别为一个编码单元定义对应于不同预定义的最大编码比特长度的多个候选比特预算; 当对帧的访问单元的当前编码单元内的多个像素的像素数据进行编码时，确定从候选比特预算中选出的目标比特预算，并将目标比特预算分配给当前编码单元; 并且输出从编码器生成的当前编码单元内的像素的编码像素数据，其中编码像素数据的位长度小于或等于目标比特预算。

公开(公告)号：US12160584B2

公开(公告)日：2024-12-03

申请号：US17892139

申请日：2022-08-22

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Ping-Han Lee ,  Tzu-Yun Tseng

IPC: H04N11/02 ,  H04N19/14 ,  H04N19/172 ,  H04N19/182

Abstract: A video encoding apparatus includes a content activity analyzer circuit and a video encoder circuit. The content activity analyzer circuit applies a content activity analysis process to consecutive frames, to generate content activity analysis results. The consecutive frames are derived from input frames of the video encoding apparatus. The content activity analysis process includes: deriving a first content activity analysis result according to a first frame and a second frame in the consecutive frames, wherein the first content activity analysis result includes a processed frame distinct from the second frame; and deriving a second content activity analysis result according to a third frame included in the consecutive frames and the processed frame. The video encoder circuit performs a video encoding process to generate a bitstream output of the video encoding apparatus, wherein information derived from the content activity analysis results is referenced by the video encoding process.

公开(公告)号：US20210195207A1

公开(公告)日：2021-06-24

申请号：US17190409

申请日：2021-03-03

Applicant: MEDIATEK INC.

Inventor： Li-Heng Chen ,  Tung-Hsing Wu ,  Yi-Hsin Huang ,  Lien-Fei Chen ,  Ting-An Lin ,  Han-Liang Chou

IPC: H04N19/15 ,  H04N19/105 ,  H04N19/172 ,  H04N19/159 ,  H04N19/184 ,  H04N19/463

Abstract: A video encoding apparatus includes a data buffer and a video encoding circuit. Encoding of a first frame includes: deriving reference pixels of a reference frame from reconstructed pixels of the first frame, respectively, and storing reference pixel data into the data buffer for inter prediction, wherein the reference pixel data include information of pixel values of the reference pixels. Encoding of a second frame includes performing prediction upon a coding unit in the second frame to determine a target predictor for the coding unit. The prediction performed upon the coding unit includes: determining the target predictor for the coding unit according to whether a search range on the reference frame for finding a predictor of the coding unit under an inter prediction mode includes at least one reference pixel of the reference frame that is not accessible to the video encoding circuit.

公开(公告)号：US10602192B2

公开(公告)日：2020-03-24

申请号：US15422484

申请日：2017-02-02

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Li-Heng Chen ,  Han-Liang Chou

IPC: H04N7/12 ,  H04N19/91

Abstract: An entropy encoder includes an entropy encoding circuit and a size determining circuit. The entropy encoding circuit receives symbols of a pixel group, and entropy encodes data derived from the symbols of the pixel group to generate a bitstream segment which is composed of a first bitstream portion and a second bitstream portion. The first bitstream portion contains encoded magnitude data of the symbols of the pixel group, and the second bitstream portion contains encoded sign data of at least a portion of the symbols of the pixel group. The size determining circuit determines a size of a bitstream portion, wherein the bitstream portion comprises at least one of the first bitstream portion and the second bitstream portion.

公开(公告)号：US10575000B2

公开(公告)日：2020-02-25

申请号：US15485283

申请日：2017-04-12

Applicant: MEDIATEK INC.

Inventor： Tung-Hsing Wu ,  Li-Heng Chen ,  Han-Liang Chou

IPC: H04N19/176 ,  H04N19/124 ,  H04N19/105 ,  H04N19/593 ,  H04N19/147 ,  H04N19/51

Abstract: A method and apparatus of image coding performed at an encoder or decoder using block prediction are disclosed. The block vector bit-count information associated with one or more block vectors (BVs) for the current block is determined, where the BVs are used to locate one or more block predictors for the current block. Prediction residuals corresponding to differences between the current block and the block predictors are determined. A first cost comprising the BV and residual bit-count information associated with encoding the prediction residuals using the first coding tool is determined. The second cost comprising the BV bit-count information and without the residual bit-count information is also determined. The derivation of the BV bit-count information and the prediction residuals for the current block are performed only once, and the BV bit-count information and the prediction residuals are used by the first coding tool and the second coding tool.